The internal structure and working principle of the mcs-51 single chip microcomputer CPU

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There is an 8-bit CPU inside the single-chip microcomputer. At the same time, we know that the CPU contains an arithmetic unit, a controller and several registers. The internal structure and working principle of the 51 single-chip microcomputer CPU.


From the figure we can see that the dotted box is the internal structure of the CPU. The CPU of the 8-bit MCS-51 microcontroller consists of an arithmetic logic unit ALU (Arithmetic Logic Unit), accumulator A (8 bits), register B (8 bits), program status word PSW (8 bits), program counter PC (sometimes also called instruction pointer, i.e. IP, 16 bits), address register AR (16 bits), data register DR (8 bits), instruction register IR (8 bits), instruction decoder ID, controller and other components. 



Picture 1

1. The main functions of the arithmetic unit (ALU) 
A) Arithmetic and logical operations, which can operate on half-byte (a byte is 8 bits, half-byte is 4 bits) and single-byte data. 
B) Arithmetic operations such as addition, subtraction, multiplication, division, addition 1, subtraction 1, comparison, etc. 
C) Logical operations such as AND, OR, XOR, complement, loop, etc. 
D) Bit processing function (i.e. Boolean processor). 
Since there is no register inside the ALU, the operands participating in the operation must be placed in the accumulator A. Accumulator A is also used to store the results of the operation. 
For example: when executing the instruction ADD A, B 
executes this instruction, the content in accumulator A is input into the ALU through the input port In_1, register B is input into the ALU through the internal data bus and the input port In_2, and the result of A+B is sent back to the accumulator A through the output port Out of the ALU and the internal data bus.


2. Program counter PC 
The function of PC is to store the address of the instruction to be executed. It has 16 bits in total and can directly address the 64K ROM. The lower 8 bits of PC are output through port P0, and the upper 8 bits are output through port P2. In other words, the program counter PC points to where the program is executed, and it always follows the execution of the program. We know that the user program is stored in the internal ROM. If we want to execute the program, we must read it out byte by byte from the ROM, and then execute it in the CPU. So which line does the ROM execute specifically? This requires our program counter PC to indicate. The 
program counter PC has the function of automatically adding 1, that is, after reading a byte of instruction code from the memory, PC automatically adds 1 (pointing to the next storage unit). 
3. Instruction register IR 
The function of the instruction register is to store the instruction code to be executed. 
Here we first briefly understand the process of CPU executing instructions. First, the instruction code is read from the program memory (ROM) and sent to the instruction register. After being decoded by the decoder, the timing and control circuit sends the corresponding control signal to complete the function of the instruction. We will explain in detail the execution process of instructions in the microcontroller in another lesson later. 
4. The instruction decoder ID 
is used to decode the instructions sent to the instruction register. The so-called decoding is to convert the instructions into the electrical signals required to execute the instructions. When the instructions are sent to the decoder, the decoder decodes the instructions. According to the signals output by the decoder, the CPU control circuit regularly generates various control signals required to execute the instructions, so that the microcontroller can correctly execute the various operations required by the program.


5. Address register AR (16 bits) 
AR is used to store the address information of the external memory unit to be addressed. The address code of the memory unit where the instruction code is located is generated by the program counter PC, and the address code of the memory unit where the operand in the instruction is located is given by the operand of the instruction. From the above figure, we can see that the address register AR is connected to the external memory through the address bus AB. 
6. Data register DR 
is used to store data information written to the external memory or I/O port. It can be seen that the data register has a latching function for output data. The data register is directly connected to the external data bus DB. 
7. Program status word PSW 
is used to record the status of the operation process, such as overflow, carry, etc. 
For example, the content of accumulator A is 83H, and the execution is: 
ADD A, #8AH; accumulator A is added to the immediate value 8AH, and the result is stored in A. 
After the instruction, the result of the sum will be [1]0DH, but accumulator A has only 8 bits and can only store the lower 8 bits, that is, 0DH, and the highest bit B8 in the result cannot be stored. For this reason, a carry flag C is set in the CPU. When a carry occurs during addition, the carry flag C is 1. 
8. The timing component 
consists of a clock circuit and a pulse distributor to generate the timing pulse signal required by the micro-operation control component.


Keywords:mcs-51 Reference address:The internal structure and working principle of the mcs-51 single chip microcomputer CPU

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