MCU:STM32F334C8T6
Recently, for some reasons, a PWM waveform with arbitrary phase shift is needed to drive a full-bridge circuit. This article records the implementation process.
Similar to a full-bridge rectifier, replacing the four diodes with switching devices creates a full-bridge inverter. The two bridge arms need to be driven by four, two sets of complementary PWM waveforms. However, in this requirement, the two sets of complementary PWM waveforms are not exactly the same, but have a certain phase difference, and this phase difference may be an arbitrary value.
The generation of complementary PWM waves is relatively simple. The previous article talked about the method of using a general timer. This article uses the TIMx_CHy and TIMx_CHyN channels of an advanced timer or a general timer with complementary output function. The two timers generate two sets of complementary PWM waves, and the duty cycle and frequency can be adjusted.
(See the previous article: How to use the STM32 general-purpose timer to output two complementary PWMs with adjustable duty cycle and frequency )
This article focuses on how to produce phase shift at any angle.
So I started reading the official manual of STM32F334, looking for the functions of timer synchronization and master-slave mode!
Slave mode: Gated mode
The counter can be enabled depending on the level of a selected input.
This means that a timer can be enabled or disabled using an input signal.
An example is given in the official manual:
Using one timer to enable another timer
In this example, we control the enable of TIM2 with the output compare 1 of Timer 3. Refer
to Figure 205 for connections. TIM2 counts on the divided internal clock only when OC1REF
of TIM3 is high. Both counter clock frequencies are divided by 3 by the prescaler compared
to CK_INT (fCK_CNT = fCK_INT/3).
1. Configure TIM3 master mode to send its Output Compare 1 Reference (OC1REF)
signal as trigger output (MMS=100 in the TIM3_CR2 register).
2. Configure the TIM3 OC1REF waveform (TIM3_CCMR1 register).
3. Configure TIM2 to get the input trigger from TIM3 (TS=000 in the TIM2_SMCR
register).
4. Configure TIM2 in gated mode (SMS=101 in TIM2_SMCR register).
5. Enable TIM2 by writing ‘1 in the CEN bit (TIM2_CR1 register).
6. Start TIM3 by writing ‘1 in the CEN bit (TIM3_CR1 register).
Note: The counter 2 clock is not synchronized with counter 1, this mode only affects the TIM2
counter enable signal.
In the STM32F334C8T6 chip, TIM2 and TIM3 do not have complementary PWM output function. The advanced timer TIM1 and general timer TIM15, 16, 17 have complementary output function.
To connect two timers using the master-slave mode, there needs to be output and input signals between the two.
From these three tables, we can see that only TIM1 and TIM15 can be used, and TIM15 is the master and TIM1 is the slave.
Use CH1 and CH1N of TIM1 and TIM15 to output a set of complementary PWM respectively, and use TIM15_CH2 to output the trigger signal OC2REF
After determining the timer to be used, the next step is to write the program. The program probably has the following parts:
Calculation parameters //See previous article
Configuring Output Pins
Basic clock configuration //See the previous article
Output mode and parameter configuration //See previous article
Complementary Output Configuration
Master-slave mode and trigger signal configuration
Enable clock
Modify the trigger signal //It is very important, otherwise the output will be wrong
The steps to configure the master-slave mode are as follows:
1. Configure the Master Timers using the following functions:
void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t
TIM_TRGOSource);
void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t
TIM_MasterSlaveMode);
2. Configure the Slave Timers using the following functions:
void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t
TIM_InputTriggerSource);
void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
Part of the code:
//#include "***"
//function name
{
uint16_t pulse=0 ,Period=0,shiftphase=0,deadtime=0;
uint16_t freq = 100000; //Required frequency, set to 100k
//Calculate each parameter and assign it to the corresponding variable. Do not use dead zone, so deadtime=0
Period = 72*1000000 / freq; //Total number of counts in one PWM cycle when the timer clock is 72MHz
pulse= Period * 45 /100; // Pulse width count times, = total times * duty cycle, duty cycle 45?, adjustable
shiftphase = Period *90/360; //Set the phase shift to 90 degrees
shiftphase += 340*72/1000; //Phase compensation, here the compensation is 0.34us, see Note 1
//Configure GPIO pins and corresponding multiplexing functions
//Basic clock configuration, see the previous article
TIM_TimeBaseInit(PWM12_TIM, & TIM_TimeBaseInitStruct);
TIM_TimeBaseInit(PWM34_TIM, & TIM_TimeBaseInitStruct);
//For output mode and parameter configuration, see the previous article
TIM_OCInitStruct.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStruct.TIM_Pulse = pulse ; //Pulse width
TIM_OCInitStruct.TIM_OCPolarity = TIM_OCPolarity_High;
//..........Write other parameters
//PWM1,2
TIM_OC1Init(TIM15, & TIM_OCInitStruct);
TIM_OC1PreloadConfig(TIM15, TIM_OCPreload_Enable);
//PWM3,4
TIM_OC1Init(TIM1, & TIM_OCInitStruct);
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
//Trigger signal
TIM_OCInitStruct.TIM_Pulse =shiftphase; //The pulse width of the trigger signal, that is, the amount of phase shift
TIM_OCInitStruct.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OC2Init(TIM15, &TIM_OCInitStruct);
TIM_OC2PreloadConfig(TIM15, TIM_OCPreload_Enable);
//Configure master-slave mode
//Master slave mode
TIM_SelectOutputTrigger(TIM15, TIM_TRGOSource_OC2Ref);
TIM_SelectMasterSlaveMode(TIM15, TIM_MasterSlaveMode_Enable);
TIM_SelectInputTrigger(TIM1, TIM_TS_ITR0);
TIM_SelectSlaveMode(TIM1, TIM_SlaveMode_Gated);
// Enable timer and PWM output
//TIM_Cmd();
//TIM_CtrlPWMOutputs();
// Make the trigger signal always valid, a very important step, see Note 2
while(TIM_GetFlagStatus(TIM15, TIM_FLAG_Trigger) == RESET);
TIM_OCInitStruct.TIM_Pulse =Period;
TIM_OC2Init(PWM12_TIM, &TIM_OCInitStruct);
//Finish
}
Note 1: Phase shift compensation. Since it takes time to turn on the clock and execute the code, the phase shift will be inaccurate, so the phase shift value needs to be corrected, that is, compensated. The value 0.34us given in the code is the compensation value obtained by measurement at a frequency of 100K. This value has a high accuracy in the range of 0~300 degrees and can reach +-0.003us (or +-0.02 degrees). The compensation value is affected by many factors, such as frequency, code execution efficiency (high assembly efficiency), chip core energy, etc.
The minimum phase shift is 1/720
Note 2: Since TIM1 works in the gatmode of slave mode, the counter will work only when the trigger signal is high. Therefore, once TIM1 is triggered, the trigger signal clock must be in a high state to ensure the normal operation of TIM1, otherwise the output frequency and duty cycle will change! (According to my understanding, TIM_Pulse=0 should be set here in the case of PWM_MODE1 and TIM_OCPolarity_Low;, but in fact it is correct to set it to TIM_Pulse=Period. I haven't figured out why yet)
Complete code:
http://download.csdn.net/detail/wind4study/8562427
Effect diagram: Phase shift 90 degrees
Previous article:STM32 asymmetric PWM mode realizes dynamic phase shift
Next article:STM32 general-purpose timer realizes output of two complementary PWMs with adjustable duty cycle and frequency
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