The difference between STM32 interrupts and events

This figure is a schematic diagram of an external interrupt line or external event line. There is a slash on the signal line in the figure, and the annotation marked with the word 19 next to it indicates that there are 19 sets of such lines. The blue dotted arrow in the figure marks the transmission path of the external interrupt signal. First, the external signal enters from the chip pin numbered 1, passes through the edge detection circuit numbered 2, enters the interrupt suspension request register through the OR gate numbered 3, and finally outputs to the NVIC interrupt detection circuit through the AND gate numbered 4. This edge detection circuit is controlled by the rising edge or falling edge selection register. The user can use these two registers to control which edge is required to generate an interrupt. Because the selection of the rising edge or falling edge is controlled by two parallel registers respectively, the user can select the rising edge or the falling edge at the same time. If there is only one register control, then only one edge can be selected.

Next is the OR gate numbered 3. The other input of this OR gate is the software interrupt/event register. From this, we can see that the software can request an interrupt or event before the external signal. That is, when the corresponding bit of the software interrupt/event register is "1", the OR gate numbered 3 will output a valid signal regardless of the external signal.

An interrupt or event request signal passes through the OR gate number 3 and enters the suspend request register. Before this, the signal transmission paths of interrupts and events are consistent, that is, the level changes of external signals are recorded in the suspend request register.

The external request signal finally passes through the AND gate No. 4 and sends an interrupt request to the NVIC interrupt controller. If the corresponding bit of the interrupt mask register is "0", the request signal cannot be transmitted to the other end of the AND gate, thus realizing the interrupt masking.

After understanding the request mechanism of external interrupts, it is easy to understand the request mechanism of events. The red dotted arrow in the figure marks the transmission path of the external event signal. After the external request signal passes through the OR gate numbered 3, it enters the AND gate numbered 5. The function of this AND gate is similar to that of the AND gate numbered 4, which is used to introduce the control of the event mask register; finally, a jump signal of the pulse generator is converted into a single pulse and output to other functional modules in the chip. From this figure, we can also know that from the perspective of external excitation signals, the sources of interrupts and events can be the same. The reason why it is divided into two parts is that interrupts require the participation of the CPU, and the software's interrupt service function is required to complete the results generated after the interrupt; but events rely on the pulse generator to generate a pulse , and then the hardware automatically completes the result of this event. Of course, the corresponding linkage components need to be set up first, such as causing DMA operation, AD conversion, etc.;
a simple example: external I/O triggers AD conversion to measure the weight of external objects; if the traditional interrupt channel is used, I/O triggers to generate an external interrupt, the external interrupt service program starts AD conversion, and the interrupt service program submits the final result after the AD conversion is completed; if the event channel is used, the I/O trigger generates an event, and then the linkage triggers AD conversion, and the interrupt service program submits the final result after the AD conversion is completed; in comparison, the latter does not require software to participate in AD triggering, and the response speed is also faster; if the event is used to trigger the DMA operation, some linkage tasks can be completed without software participation.

Summarize:

It can be simply considered that the event mechanism provides a channel from triggering to generating results that is completely completed by hardware automatically, without the involvement of software, reducing the CPU load, saving interrupt resources, and improving the response speed (hardware is always faster than software). It is an effective way to use hardware to improve the CPU chip's ability to handle events;