Seven addressing modes (addressing mode for 32-bit addresses)

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In 32-bit microcomputer systems, in addition to supporting the previous seven addressing modes, a more flexible, convenient, but also more complex memory addressing mode is provided, thereby further expanding the addressing range of the memory address.

When using 16-bit registers to access storage units, only the base address register (BX and BP) and the index register (SI and DI) can be used as part of the address offset, but when using 32-bit registers for addressing, there is no such restriction. All 32-bit registers (EAX, EBX, ECX, EDX, ESI, EDI, EBP and ESP) can be a part of the address offset.

When addressing with a 32-bit address offset, the offset of the memory address can be divided into three parts: a 32-bit base address register, a 32-bit index register that can be multiplied by 1, 2, 4 or 8, and an 8-bit/32-bit offset constant, and these three parts can be combined arbitrarily, omitting one or two of them.

The 32-bit base registers are: EAX, EBX, ECX, EDX, ESI, EDI, EBP and ESP; The
32-bit index registers are: EAX, EBX, ECX, EDX, ESI, EDI and EBP (except ESP).

Here are some 32-bit address instructions:

MOV AX, [123456H]
 MOV EAX, [EBX] 
MOV EBX, [ECX*2]
 MOV EBX, [EAX+100H] 
MOV EDX, [EAX*4+200H]
 MOV EBX, [EAX+EDX*2] 
MOV EBX, [EAX+EDX*2+300H]
 MOV AX, [ESP] 

The effective address calculation formula for addressing with a 32-bit address offset is summarized as shown in the formula.

Since the 32-bit addressing mode can use all general registers, there are new regulations for the segment registers combined with the effective address. The specific regulations are as follows: 

1. The writing order of the registers in the address determines whether the register is a base register or an index register;

For example, EBX in [EBX+EBP] is the base register and EBP is the index register, while EBP in [EBP+EBX] is the base register and EBX is the index register;

2. The selection of the default segment register depends on the base register;

3. When the base register is EBP or ESP, the default segment register is SS, otherwise, the default segment register is DS;

4. In the instruction, if the segment prefix is ​​used, the explicit segment register takes precedence.

The following lists several 32-bit addressing instructions and their memory operand segment registers.

Example of instructionSegment registers used to access memory locations
MOV AX, [123456H];Default segment register DS
MOV EAX, [EBX+EBP];Default segment register DS
MOV EBX, [EBP+EBX];Default segment register SS
MOV EBX, [EAX+100H];Default segment register DS
MOV EDX, ES:[EAX*4+200H];Explicit segment register ES
MOV [ESP+EDX*2], AX ;Default segment register SS
MOV EBX, GS:[EAX+EDX*2+300H];Explicit segment register GS
MOV AX, [ESP] ;Default segment register SS


Reference address:Seven addressing modes (addressing mode for 32-bit addresses)

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