STM32f103RBt6--RCC Notes

                    Three different clock sources can be used to drive the system clock (SYSCLK):

                               ● HSI oscillator clock 8M
                               ● HSE oscillator clock 
                               ● PLL clock

                     These devices have the following two secondary clock sources:

                               ● 40kHz low speed internal RC (LSI RC) oscillator, can be used to drive an independent watchdog, or to drive
                                     the RTC through program selection, used to automatically wake up the system from stop/standby mode. 
                               ● 32.768kHz low speed external crystal (LSE crystal) can also be selected through program to drive the RTC (RTCCLK). 

                    When not in use, each clock source can be independently enabled or disabled, thereby optimizing system power consumption.

                 When HSI is used as the PLL clock input, the maximum frequency that the system clock can obtain is 36MHz.

Note: HSBI low-speed external -> PLL -> sysclk (max36M) - frequency division > AHB -> AHB1 (max18M) AHB2 (max36M) map other external resources respectively.

       HSB2 high-speed external -> PLL -> sysclk (max72M) - frequency division > AHB -> AHB1 (max36M) AHB2 (max72M) are mapped to other external resources respectively

Below are some configuration routines. Please note that you must write what is defined in the main function: ErrorStatus HSEStartUpStatus;

 void RCC_Configuration(void)
{   
       RCC_DeInit(); /* Reset the peripheral RCC registers to default values ​​RCC system reset(for debug purpose) */
       RCC_HSEConfig(RCC_HSE_ON); /* Enable HSE *//*Turn on high-speed external clock, we can also turn on external low-speed clock*/
       HSEStartUpStatus = RCC_WaitForHSEStartUp();/* Wait till HSE is ready *//*Wait for response*/

  if(HSEStartUpStatus == SUCCESS)
  {
     FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Enable Prefetch Buffer *//*Prefetch buffer*/
     FLASH_SetLatency(FLASH_Latency_2); /* Flash 2 wait state */ 
     RCC_HCLKConfig(RCC_SYSCLK_Div1); /* HCLK=SYSCLK *//*TO AHBbus memory and DMA*/
     RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK2=HCLK *//*The maximum clock of pclk1 can be 72M*/   
     RCC_PCLK1Config(RCC_HCLK_Div2); /* PCLK1=HCLK/2*//*The maximum clock of pclk1 can only be 36M*/
     RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* PLLCLK=8MHz * 9 = 72 MHz */
     RCC_PLLCmd(ENABLE); /* Enable PLL */

                     /*Clock peripheral*/
  RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB| /*Bus APB2 peripheral clock settings*/
                                 RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO ,
            ENABLE 
                               );

     while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)                     /* Wait till PLL is ready */
     {
     }
     RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);                           /* Select PLL as system clock source */
     while(RCC_GetSYSCLKSource() != 0x08)                                /* Wait till PLL is used as system clock source */
     {
     }
  }
}

Method to start some clocks: Start external clock -> wait -> start PLL -> wait for PLL -> start system -> wait

   void SYSCLKconfig_STOP(void)
  {
    RCC_HSEConfig(RCC_HSE_ON); /*HSES enable*/  
    HSEStartUpStatus = RCC_WaitForHSEStartUp(); /*Wait*/
    if(HSEStartUpStatus == SUCCESS) 
       { 
      RCC_PLLCmd(ENABLE);/*Enable*/
         while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)== RESET); /*Wait for PLL to be valid*/      
   RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);/*Use PLL as system clock*/
   while(RCC_GetSYSCLKSource() != 0x08);/*Wait*/
     } 
  }