1. Understanding the concept of STM32 interrupt priority
There are two priority concepts in STM32 (Cortex-M3): preemptive priority and response priority. The response priority is also called "sub-priority" or "sub-priority". Each interrupt source needs to be assigned these two priorities.
1. What is pre-emption priority?
Interrupt events with high preemptive priority will interrupt the current main program/interrupt program execution—preemptive priority response, commonly known as interrupt nesting.
2. What is subpriority?
In the case of the same preemptive priority, the interrupt with higher sub-priority will be responded to first;
In the case of the same preemptive priority, if a lower sub-priority interrupt is being executed, the higher sub-priority interrupt must wait until the lower sub-priority interrupt that has been responded to is completed before it can be responded to - non-preemptive response (cannot be nested).
3. Basis for judging whether an interrupt will be responded to
First is the preemptive priority, followed by the secondary priority;
The preemptive priority determines whether interrupts will be nested;
4. Handling priority conflicts
An interrupt with a high preemptive priority can be responded to during the interrupt processing with a low preemptive priority, that is, interrupt nesting, or an interrupt with a high preemptive priority can nest an interrupt with a low preemptive priority.
When the preemptive priority of two interrupt sources is the same, there will be no nesting relationship between the two interrupts. When one interrupt arrives, if another interrupt is being processed, the later interrupt will have to wait until the previous interrupt is processed. If the two interrupts arrive at the same time, the interrupt controller decides which one to process first based on their response priority; if their preemptive priority and response priority are equal, the order of their ranking in the interrupt table determines which one to process first.
5. Definition of interrupt priority in stm32
There are 4 register bits in STM32 that specify interrupt priority. These 4 register bits are grouped as follows:
Group 0: All 4 bits are used to specify the response priority
Group 1: The highest 1 bit is used to specify the preemptive priority, and the lowest 3 bits are used to specify the response priority
Group 2: The highest 2 bits are used to specify the preemptive priority, and the lowest 2 bits are used to specify the response priority
Group 3: The highest 3 bits are used to specify the preemptive priority, and the lowest 1 bit is used to specify the response priority
Group 4: All 4 bits are used to specify the preemptive priority
In order to adapt to the combination of different priorities, STM32 sets up the concept of GROUP. The group is a large framework, under which the preemptive priority and sub-priority are allocated. Each interrupt has a dedicated register (Interrupt Priority Registers) to describe the preemptive priority and sub-priority of the interrupt. In this register, STM32 uses 4 binary description bits to describe the priority (Cortex M3 defines 8 bits, but STM32 only uses 4 bits).
2. Introduction to stm32 timer
There are a total of 11 timers in STM32, including 2 advanced control timers, 4 ordinary timers and 2 basic timers, as well as 2 watchdog timers and 1 system tick timer.
Among them, TIM1 and TIM8 are advanced timers
TIM2.TIM3.TIM4.TIM5 are common timers
TIM6.TIM7 are basic timers
Timer |
Counter resolution |
Counter Type |
Prescaler factor |
Generate DMA request |
Capture compare channel |
Complementary output |
TIM1 TIM8 |
16-bit |
Up, Down, Up/Down |
Any number between 1 and 65536 |
Can |
4 |
have |
TIM2 TIM3 TIM4 TIM5
|
16-bit |
Up, Down, Up/Down |
Any number between 1 and 65536 |
Can |
4 |
have |
TIM6 TIM7 |
16-bit |
up |
Any number between 1 and 65536 |
Can |
4 |
have |
Selection of ordinary timer clock
The counter clock can be provided by the following clock sources:
● Internal clock (CK_INT)
● External clock mode 1: external input pin (TIx)
● External clock mode 2: External trigger input (ETR)
● Internal trigger input (ITRx): Use one timer as a prescaler for another timer. For example, you can configure a timer
3. Programming steps
1. Configure the system clock
2. Configure the priority of the corresponding interrupt NVIC
3. Configure GPIO
4. Configure specific TIME
5. Write the corresponding interrupt service program
The timer driver file is misc.c
Now let's analyze the programming steps, mainly focusing on the second and fourth steps.
The second part configures the interrupt NVIC priority. The specific configuration parameters are:
(1) Select interrupt group
(2) Configure the corresponding timer interrupt channel
(3) Setting the priority of preemptive interrupts
(4) Setting the priority of responsive interrupts
(5) Enable interrupt
(6) Interrupt initialization
The Timer configuration is as follows:
(1) Set the clock source of the Time module
(2) Use the TIM_DeInit() function to set the Timer to the default value
(3) TIM_Period automatic reload register period value (count value)
(4) TIM_Prescaler sets the clock division factor
(5) TIM_ClockDivision sets the clock division? ?
(6) TIM_CounterMode sets the counting mode
(7) Initialize all the numerical functions above
(8) Clear the overflow interrupt flag
(9) Enable the interrupt overflow function
(10) Enable TIME interrupt
Calculation of timer interrupt time
Calculated as follows:
Tout = (TIM_Period*( TIM_Prescaler +1))/TCLK;
in:
Tout: overflow time of time
Tclk: TIM input clock frequency (unit: Khz), when the internal clock (CK_INT) is selected, assuming the system clock is 72Mhz, although TIMx belongs to a low-speed bus, the maximum speed of this bus can only be 36Mhz, but there is a *2 multiplier inside the chip to multiply this low-speed 36M to 72M, the speed is still 72Mhz, if TIM_Prescaler is assigned 7200-1, the effect after pre-division is 0.0001S per cycle.
TIM_Period: Preload value
TIM_Prescaler: frequency division coefficient
Friends who are used to using 51 or AVR always regard interrupt functions and ordinary functions as different. They always think that interrupt functions in C language should indicate specific attributes so that the compiler can generate special instructions (such as return interrupt). However, in CORTEX-M3, there is no difference between interrupt routines and ordinary C routines. It stands to reason that the compiler should provide an indicator word, such as __interrupt, so that the interrupt program can locate the interrupt vector of the convection. However, the ARM compiler does not provide such an indicator word, so we can only write the interrupt function in the C program directly in the startup code of the assembly: For example, we wrote the following UART1 interrupt function: In 51 and AVR, this is automatically handled by the compiler through the function attributes. In ARM7, the interrupt function address can be written into the corresponding interrupt register. In CM3, we have to modify it manually.
The interrupt service function is written in the stm32f10x_it.c file, and the function name of the interrupt service subroutine must be in accordance with the corresponding vector name in the interrupt vector table in the startup_stm32d10x_hd.s file. If you are worried about writing the wrong function name, you can directly open the startup_stm32d10x_hd.s file. For specific interrupt functions.
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Recommended ReadingLatest update time:2024-11-16 23:57
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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