STM32 timer PWM output

　　Except for TIM6 and TIM7, all other timers of STM32 can be used to generate PWM signals. Advanced timers TIM1 and TIM8 can generate 7 PWM outputs at the same time, and general timers can generate 4 PWM outputs at the same time.

　　The steps for setting the STM32 timer PWM output are as follows:

1) Turn on the STM32 clock and configure the output I/O as multiplexed output

2) Set ARR (period) and PSC (prescaler)

3) Set PWM mode (edge-aligned or center-aligned)

4) Enable the channel output of the timer and enable the timer

5) Modify CCR2 to control the duty cycle

　　Example: 72MHz main frequency, PB7 (TIM4_CH2) output PWM

  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;   // for PWM
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  GPIO_Init(GPIOB, &GPIO_InitStructure);

void TIM4_Configuration(void) // for PWM
{ 
　　RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
 
　　TIM4->ARR = 900; // Set counter auto reload value 72MHz/900 = 8kHz
　　TIM4->PSC = 0; // Prescaler does not divide
　　TIM4->CCMR1 |= 7<<12; // PWM2
　　TIM4->CCMR1 |= 1<<11; // CH2 preload enable
　　TIM4->CCER |= 1<<4; // OC2 output enable
　　TIM4->CR1 |= 0x8000; // ARPE enable
　　TIM4->CR1 |= 0x01; // Enable timer
　　TIM4->CCR2 = 550; // Adjust duty cycle

}

　　Because each version of the IAR firmware library is different, this routine directly controls the registers for easy understanding.

Add a routine based on the firmware library (TIM3 is used as an example, IO settings are omitted):

void TIM3_Configuration(void)
{ 
 　　// Output two PWM
　　 /*----------------------------------------------------------
 　　RCC_APB2PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
 
　　 TIM3->ARR = 900; // Maximum 900
　　 TIM3->PSC = 0;
　　 TIM3->CCMR1 |= 7<<12; // PWM2 center alignment
　　 TIM3->CCMR1 |= 1<<11; // CH2 pre-load enable
　　 TIM3->CCER |= 1<<4; // OC2 output enable
 
　　 TIM3->CCMR1 |= 7<<4; // PWM2 center alignment
　　 TIM3->CCMR1 |= 1<<3; // CH1 pre-load enable
　　 TIM3->CCER |= 1; // OC1 output enable
 
　　 TIM3->CR1 |= 0x8000; // ARPE enable
　　 TIM3->CR1 |= 0x01; // Enable timer  
　　 TIM3->CCR1 = 100; // Adjust duty cycle TIM3_CH1
　　 TIM3->CCR2 = 300; // Adjust duty cycle TIM3_CH2 
　　 -----------------------------------------------------------*/ 
 
　　 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
　　 TIM_OCInitTypeDef TIM_OCInitStructure;
 
　　 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
 
　　 TIM_TimeBaseStructure.TIM_Period = 999;
　　 TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_ClockDivision
　　 = 0;
　　 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 
　　 TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
 
　　 /* PWM1 Mode configuration: Channel1 */
　　 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
　　 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
　　 TIM_OCInitStructure.TIM_Pulse = 500;
　　 TIM_OCInitStructure.TIM_OCPolarity = TIM_OC Polarity_High;
　　 TIM_OC1Init(TIM3, &TIM_OCInitStructure);
　　 TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);
 
　　 /* PWM1 Mode configuration: Channel2 */
　　 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
　　 TIM_OCInitStructure.TIM_Pulse = 300; 
　　 TIM_OC2Init (TIM3, &TIM_OCInitStructure); 
　　 TIM_OC2PreloadConfig(TIM3, TIM_OCPreload_Enable);
  
　　 TIM_ARRPreloadConfig(TIM3, ENABLE);
　　 TIM_Cmd(TIM3, ENABLE);
}