MSP430 learning core reset signal

POR is the power-on reset signal, which is only generated when the following three events occur:
1. The chip is powered on.
2. -RST/NMI is set to reset mode, and a low-level signal appears on the RST/NMI pin. 3. When PORON=1, an SVS is in a low state (I don’t understand). The
PUC signal is a power-on clear signal. The generation of the POR signal will always generate the PUC signal, but the generation of the PUC signal will not generate the POR signal. The events that generate it are:
1. The POR signal occurs.
2. In the watchdog mode, the watchdog timer expires.
3. The watchdog timer writes an incorrect security key value.
4. The FLASH memory writes an incorrect security key value.
5. A CPU instruction fetches data from the peripheral address range 0h~01ffh.
The relationship between POR and PUC: The generation of the POR signal will cause "system reset" and "generate a PUC signal". The PUC signal will not cause the generation of the POR signal.

Whether the reset is triggered by the POR signal or the PUC signal, the MSP430 will read the reset interrupt vector from address 0xFFFE, and the program will start executing from the address pointed to by the interrupt vector. Among the conditions for triggering the PUC signal, except for the POR triggering the PUC signal, the other conditions can be determined by reading the corresponding interrupt vector to determine the cause of the PUC signal so as to make corresponding processing.
         The status after the system reset (referring to POR) is: (1) - The RST/NMI pin function is set to the reset function; (2) All I/O pins are set to input; (3) The peripheral modules are initialized, and their register values ​​are the default values ​​in the relevant manual; (4) The status register SR is reset; (5) The watchdog is activated and enters the working mode; (6) The program counter PC is loaded with the address at 0xFFFE, and the microprocessor starts executing the program from this address.
         There are three typical reset circuits:
(1) Connect a 100K ohm pull-up resistor to the RST/NMI pin.
(2) Based on (1), a 0.1uf capacitor is connected, and one end of the capacitor is grounded, which can make the reset more reliable.
(3) Based on (2), a diode model IN4008 is connected in parallel to the resistor, which can reliably realize the immediate power-on after the system is powered off.

BOR  

         In the chip without BOR, "if the power-on of the chip is periodic, the power-off VCC must be reduced to Vmin to ensure that a new POR signal occurs when VCC is loaded again. If VCC does not drop below Vmin in a cycle, or because of interference, the POR signal will not occur, so the initial state after power-on will be incorrect.
        For modules with BOR, it should be "when VCC exceeds Vcc(start), the POR signal becomes valid until VCC exceeds V(B_IT+), and then after a delay t(BOR). The delay t(BOR) will be extended accordingly as the angle of the Vcc voltage increases. The hysteresis
Vhys(B_IT-) requires VCC to drop below V(B_IT-) to ensure that the POR signal is generated again through the BOR circuit. V(B_IT-) is higher than Vmin, which enables BOR to provide a valid power failure restart signal when VCC does not drop to Vmin.

        Battery replacement in high-precision devices can cause voltage fluctuations. The zero-power brownout reset (BOR) function is used to reset the MSP430 in low-voltage conditions to prevent unexpected device behavior.