System clock and timer - watchdog timer

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The watchdog timer is the same as the ordinary timer. However, the ordinary timer usually counts for a period of time, and after the time is up, it enters the interrupt processing program, while the watchdog does not want an interrupt to occur at the end of the defined time. In order to prevent the interrupt from occurring, some registers of the watchdog timer must be reassigned before the interrupt occurs, so that it starts counting again, which is commonly known as the feeding operation.

 The registers involved in the WATCHDOG timer are as follows:

1. WTCON register

Used to set the pre-scaling factor, select the operating frequency, decide whether to enable interrupts, and whether to enable the WATDOG function (i.e., whether to output a reset signal).

WATDOG timer operating frequency = PCLK/(prescaler value+1)/(divider value)

prescaler value = 0 ~ 255;

divider value = 16,32,64,128;

The WTCON in the chip manual is as follows:

System clock and timer - watchdog timer - Cheng - Xuehai Fanzhou
2. WTDAT register
The WTDAT register is used to determine the timeout period of the WATCHDOG timer. After the timer is started, when the count (WTCNT) reaches zero, the value of the WTDAT register is automatically transferred to the WTCNT register. When the WATDOG timer is started for the first time, the value of the WTDAT register is automatically transferred to the WTCNT register.
3. WTCNT register
Before starting the watchdog timer, you must write an initial value to this register. After starting the timer, it starts to count down by one. If the count reaches 0, an interrupt is issued if the interrupt is enabled, and a reset signal is issued if the interrupt is enabled, then the value of WTDAT is loaded and the counting starts again.

 


 

#include "2440addr.h"

#define U32 unsigned int

 

void Delay(int a)

{

       int k;

       for(k=0;k

              ;

}

 

void __irq watchdog(void)

{

     

      rGPBDAT |= 1; /*Buzzer sounds*/

       /* Clear interrupt flag */

/*Pay attention to the following two lines of code. Generally speaking, the interrupt flag clearing order is: SUBSRCPND-->SRCPND-->INTPND. However, when using CodeWarrior to call AXD debugging, there is no interrupt due to the different order. However, when I click the STOP key and then the GO key, I hear a buzzer every time. This phenomenon was discovered later. Is it equivalent to directly generating an interrupt signal after each STOP, resulting in failure to feed the dog normally? I don't quite understand this. I hope someone can explain it to me*/

       rSRCPND = 0x1<<9;

       rSUBSRCPND = 0x1<<13;

       rINTPND = 0x1<<9;
       
      

}

 

void Main(void)

{

       int light;

       int temp;

       int i;


       rGPBCON = 0x155555; /*B0 output, for the buzzer; B5~B8 output, for the LED*/

       rGPBUP = 0x7ff;

 

       rWTCON = 0xf9<<8; /*Set the prescaler coefficient [15:8] and clock selection [4:3]. PCLK=50MHz Prescaler = 15*16+9=249, Division = WTCON[4:3]=0b00=16, the clock frequency is 12.5kHz*/

       rWTDAT = 50000; /*Set the watchdog timer timeout to 4 seconds (50÷12.5)*/

       rWTCNT = 50000;

       rWTCON |= (1<<5)|(1<<2); /*Start the timer [5], enable the interrupt [2], and do not send a reset signal [0]*/

/*Interrupt setting, watchdog has sub-interrupt source*/

       rSRCPND = 0x1<<9;

       rSUBSRCPND = 0x1<<13;

       rINTPND = 0x1<<9;

       rINTSUBMSK = ~(0x1<<13);            

rINTMSK = ~(0x1<<9); 

                  

       pISR_WDT_AC97 = (U32)watchdog;

 

       light = 0x000;

       temp = light | 1;

       rGPBDAT = ~temp;

       Delay(500000); /*About 0.4S delay*/
      

       while(1)

       { 
         
        
         for(i=0;i<4;i++)
         {
                light = 1<<(5+i);

                temp = light | 1;

                rGPBDAT = ~temp;
    Delay(500000);
     if(i>=2)
     {
           light = 1<<(4+2*i);
             temp = light | 1;
      rGPBDAT = ~temp;
      Delay(500000);
     }
          }
  

             rWTCNT = 50000; /*Feed the dog, reassign value, prevent interruption*/
             
           for(i=0;i<4;i++)
         {
                 light = 1>>(5+i);
                 temp = light | 1;
                 rGPBDAT = ~temp;
     Delay(500000);
     if(i>=2)
     {
           light = 1>>(4+2*i);
            temp = light | 1;
      rGPBDAT = ~temp;
      Delay(500000);
     }
          }
 
       }

}

Reference address:System clock and timer - watchdog timer

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