Clock Problems When Writing Device Drivers on S3C24x0

Publisher:忙中取乐Latest update time:2016-07-19 Source: eefocusKeywords:S3C24x0 Reading articles on mobile phones Scan QR code
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       The day before yesterday, I wrote the ADC driver for the S3C24x0 chip. In fact, it is very simple. I just need to refer to other people's drivers and modify the previous driver template. However, I did not use it successfully after writing it. After testing it again and again, I finally found that the ADC register could not be written at all, and could only be read. Frustrating!! At first I thought that the assignment statement I used was wrong. I referred to my driver learning document and tried it, but the problem still existed! After being depressed for two whole days, I saw on the Internet that someone had also encountered the situation where the peripheral registers of 2410 could not be assigned, and finally found that it was a clock problem. Inspired by this, I recalled the Linux SPI driver I had seen before, which contained the following statement:

 

hw->clk = clk_get(&pdev->dev, "spi");
    if (IS_ERR(hw->clk)) {
        dev_err(&pdev->dev, "No clock for device\n");
        err = PTR_ERR(hw ->clk);
        goto err_no_clk;
    }

    /* for the moment, permanently enable the clock */

    clk_enable(hw->clk);

 

       I didn't pay much attention to it at the time, and I regretted it! Later, I added a similar statement to the DAC driver, referring to other people's 2410 touch screen drivers, and changed "spi" to "adc". The experiment was successful!

 

 

       Samsung's S3C24x0 processor adds clock and power management to peripherals to achieve low power consumption. For details, please refer to the chapter "7. Clock & Power Management" in the chip manual. Although the clocks of these peripherals are enabled by default when the chip starts, some clocks are turned off at startup in Linux for energy saving considerations. If these clocks are not enabled, it will be impossible to write to the peripheral registers. The source code of the clock enable part in Linux mainly includes:

 

/include/asm-arm/plat-s3c24xx/clock.h
/include/asm-arm/arch-s3c2410/regs-clock.h
/arch/arm/mach-s3c2410/clock.c

 

By referring to these source codes, you can roughly know how Linux operates the peripheral clock of the S3C24x0 processor.

In particular, the following data in /arch/arm/mach-s3c2410/clock.c is helpful for programming:

 

/* standard clock definitions */

static struct clk init_clocks_disable[] = {
    {
        .name = "nand",
        .id = -1,
        .parent = &clk_h,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_NAND,
    }, {
        .name = "sdi",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_SDI,
    }, {
        .name = "adc",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable ,
        .ctrlbit = S3C2410_CLKCON_ADC,
    }, {
        .name = "i2c",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_IIC,
    }, {
        .name = "iis",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_IIS,
    }, {
        .name = "spi",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_SPI,
    }
};

static struct clk init_clocks[] = {
    {
        .name = "lcd ",
        .id = -1,
        .parent = &clk_h,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_LCDC,
    }, {
        .name = "gpio",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_GPIO,
    }, {
        .name = "usb- host",
        .id = -1,
        .parent = &clk_h,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_USBH,
    }, {
        .name = "usb-device",
        .id = -1,
        .parent = &clk_h,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_USBD,
    },{
        .name = "timers",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_PWMT,
    }, {
        .name = "uart",
        .id = 0,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C241 0_CLKCON_UART0 ,
    }, {
        .name = "uart",
        .id = 1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_UART1,
    }, {
        .name = "uart",
        .id = 2,
        .parent = &clk_p ,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_UART2,
    }, {
        .name = "rtc",
        .id = -1,
        .parent = &clk_p,
        .enable = s3c2410_clkcon_enable,
        .ctrlbit = S3C2410_CLKCON_RTC,
    }, {
        .name = "watchdog",
        .id = -1,
        .parent = &clk_p,
        .ctrlbit = 0,
    }, {
        .name = "usb-bus-host",
        .id = -1,
        .parent = &clk_usb_bus,
    }, {
        .name = "usb-bus- gadget",
        .id = -1,
        .parent = &clk_usb_bus,
    },
};


Keywords:S3C24x0 Reference address:Clock Problems When Writing Device Drivers on S3C24x0

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