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How to Erase the Contents of EPCS in Altera FPGA Configuration Device [Copy link]

 This post was last edited by Xiaomeige on 2020-2-11 21:07

Xiaomeige
February 10, 2020

Without the author's permission, this article is only allowed to be copied and reproduced on online forums, and the original author must be indicated when reprinting.

1. Why do we need to erase?
When debugging the program, the program content originally stored in EPCS will run directly after power-on. When debugging the program, we usually use jtag to download the program online. There is a problem here: there may be conflicts in the configuration of some devices. For example, when using IIC to configure the camera, the chip will re-read the firmware from EPCS when it is powered on, and then execute the configuration of the camera. Then when we are debugging, if there is no perfect reset mechanism for the camera in the newly downloaded program, it is possible that the firmware stored in EPCS will affect the operation of some registers of the camera and affect the operation of the new program.
Especially when debugging the NIOS II program, if the EPCS has been burned with NIOS II logic, or even NIOS II software program, then during debugging, due to the problem of NIOS II startup and reset mechanism, when the NIOS II software program is downloaded, if the reset is executed, it is possible that it is not the elf file you just downloaded, but the program code previously stored in EPCS that is executed, and various strange problems will occur, such as failure to download the elf program, and the running effect is inconsistent with the theoretical running effect of the written C program.
In order to avoid these effects, it is necessary to ensure that there is no data in the EPCS that may affect the currently debugged logic and program. Therefore, it needs to be erased before debugging.

2. How to erase?
The erasing method is very simple. Use the downloader to connect the board and the computer. Open the download interface and simply add to complete the erasing work. The following is a graphic display.
a. Delete all previously added or automatically added files in the download interface.
b. Click the Add Device button and find the signal of the FPGA chip you are using in the pop-up dialog box. For example, for AC620, EP4CE10F17C8 is used, so select EP4CE10 under Cyclone IV E (double-click EP4CE10 to select). Then press OK to exit.

c. Select the EP4CE10 you just added in the download interface, then right-click and select Attach Flash Device

in the pop-up dialog box. d. In the pop-up interface, select the corresponding model of the Flash device under ASC device. For example, the AC620 development board uses EPCS16, so select EPCS16, and then click OK to exit.

e. Check the Erase option and click the Start button to start erasing the Flash.

After erasing is complete, power on the development board again to verify whether EPCS has been erased through actual power-on phenomena.

This post is from Altera SoC
 
 

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