ARM bare metal development 222440 interrupt principle

There are usually three ways

1. Query method

2. Interrupt mode

3. DMA mode (in an independently developed space that is not controlled by the CPU, DMA manages it by itself. It realizes high-speed data transmission between memory and peripherals)

Mainly talk about interruption:

Interrupt request ----> interrupt arbitration ----> interrupt response ----> interrupt processing ----> interrupt return (to save the scene)

Interrupt handling process:

1. The interrupt controller captures the interrupt signal sent by the current peripheral and notifies the SOC (central processing chip: system on chip)

2. SOC saves the current program's operating environment and calls the interrupt service routine (ISR: a small piece of code) to handle the interrupt

3. In the ISR, read the interrupt control register and the related registers of the peripheral to identify the interrupt trigger, obtain the hardware interrupt number IRQ, and jump to the corresponding handler (detailed and complete handler) to complete the interrupt processing.

4. Clear interrupt: by reading and writing related registers

5. Restore the interrupted environment and continue execution (on-site)

2440 has 60 interrupt sources

The concepts of primary interrupt source, secondary interrupt source, etc.

The units indicated in the picture are the corresponding registers

The pending register source pending (SUBSRCPND, SRCPND) is cleared by writing 1 to the corresponding bit. This is different from the normal clearing method. INTPND is also cleared by writing 1.

INTOFFSET: This register is used to indicate which bit in the INTPND register is set to 1. That is, when the bit in the INTPND register is 1, the value of the INTOFFSET register is x (x is 0~31)

When the SRCPND and INTPND registers are cleared, the INTOFFSET register is automatically cleared.

For details, please refer to the chip manual S3C2440

External Interrupt:

External interrupts also have related registers: EXTINTx, EINTMASK, and EINTPEND

EXTINTx sets the interrupt trigger mode: low level, high level, rising edge, falling edge, edge trigger

EINTMASK

EINTPEND interrupt pending register (corresponding interrupt trigger, corresponding position 1) Reading this register can tell which register is triggered