Memory map of S3C2410

  The board I use is based on Samsung's 2410. Samsung's memory chip select has 8 banks. I was not very clear about the so-called bank at first. I searched on the Internet but still didn't understand it. But after reading the user manual of 2410, I understood it a little bit. The bank here is the chip select, one chip select is one bank. In U-Boot, you need to configure the number of banks of SDRAM and FLASH during configuration. If your SDRAM or FLASH only receives one chip select, just define it as 1, and the same goes for the others.
Below is the memory map of 2410. Like most other processors, 2410 supports booting from NorFlash and NANDFlash. The addresses mapped by the memories for these two booting methods are not the same. My board does not have NANDFlash, so I will take booting from NorFlash as an example:
=================================================<-------0xFFFF_FFFF
|     NOT USED
==================================================<-------0x6000_0000
|     SFR Area (control registers of each interface)
==============================================<-------0x4800_0000
==========================================<-------0x4000_0FFF
|     BootSRAM         (4KBytes)
============================================<-------0x400 0_0000
|     SROM/SDRAM    nGCS7    (bank7)
==============================================<-------0x3800_0000
|     SROM/SDRAM    nGCS6    (bank6)
============================================<------0x3000_0000
|     SROM   nGCS5    (bank5)
================================ ============<-------0x2800_0000
|     SROM   nGCS4    (bank4)
==============================================<-------0x2000_0000
|     SROM   nGCS3    (bank3)
==============================================<------0x1800_0000
|     SROM   nGCS2    (bank2)
==================================== ======<-------0x1000_0000
|     SROM   nGCS1    (bank1)
==================================================<-------0x0800_0000
|     SROM   nGCS0    (bank0)
====================================================<-------0x0000_0000
   Each bank above supports a maximum of 128M. Except bank0, each other bank supports 8/16/32-bit operation. Bank0 only supports 16/32-bit operation. On my board, the Flash is connected to bank0, a total of 8M, 16 bits, and the SDRAM is connected to bank6, one 32M, 32 bits. So when booting, the CPU starts to execute from 0x0000_0000, and the NorFlash above it stores U-Boot, which is used to boot Linux.
   What we are doing now is to successfully transplant U-Boot and then burn it to this address. Assuming that your board supplier has provided some tools, when we succeed, we can load Linux through the network and debug through the serial port. As for how to do it, we will take our time, and it will be involved in future posts...
   In the above storage address layout, the SFR Area is the address of each interface controller. We can define it as follows, from the header file s3c2410.h in the source code of Huaheng PPCboot:

#define rBWSCON        (*(volatile unsigned *)0x48000000)
#define rBANKCON0        (*(volatile unsigned *)0x48000004)
#define rBANKCON1        (*(volatile unsigned *)0x48000008)
#define rBANKCON2        (*(volatile unsigned *)0x4800000C)
#define rBANKCON3        (*(volatile unsigned *)0x48000010)
#define rBANKCON4       (*(volatile unsigned *)0x48000014)
#define rBANKCON5        (*(volatile unsigned *)0x48000018)
#define rBANKCON6        (*(volatile unsigned *)0x4800001C)
#define rBANKCON7        (*(volatile unsigned *)0x48000020)
#define rREFRESH         (* (volatile unsigned *)0x48000024)
#define rBANKSIZE        (*(volatile unsigned *)0x48000028)
#define rMRSRB6        (*(volatile unsigned *)0x4800002C)
#define rMRSRB7        (*(volatile unsigned *)0x48000030)

#define rHcRevision            (*(vol atile unsigned *)0x49000000)
#define rHcControl             (*(volatile unsigned *)0x49000004)
#define rHcCommonStatus        (*(volatile unsigned *)0x49000008)
#define rHcInterruptStatus     (*(volatile unsigned *)0x4900000C)
#define rHcInterruptEnable     (*(volatile unsigned *)0x490 00010)
#define rHcInterruptDisable    (*(volatile unsigned *)0x49000014)
#define rHcHCCA                (*(volatile unsigned *)0x49000018)
#define rHcPeriodCattendED   (*(volatile unsigned *)0x4900001C)
#define rHcControlHeadED       (*(volatile unsigned *)0x4900 0020)
#define rHcControlCurrentED    (*(volatile unsigned *)0x49000024)
#define rHcBulkHeadED          (*(volatile unsigned *)0x49000028)
#define rHcBuldCurrentED   (*(volatile unsigned *)0x4900002C)
#define rHcDoneHead            (*(volatile unsigned *)0x4 9000030)
#define rHcRmInterval          ( *(volatile unsigned *)0x49000034)
#define rHcFmRemaining       (*(volatile unsigned *)0x49000038)
#define rHcFmNumber            (*(volatile unsigned *)0x4900003C)
#define rHcPeriodicStart   (*(volatile unsigned *)0x49000040)
#define rHcLSThreshold       (*(volatile unsigned *)0x49000044)
#define rHcRhDescriptorA    (*(volatile unsigned *)0x49000048)
#define rHcRhDescriptorB   (*(volatile unsigned *)0x4900004C)
#define rHcRhStatus          (*(volatile unsigned *)0x4 9000050)
#define rHcRhPortStatus1   ( *(volatile unsigned *)0x49000054)
#define rHcRhPortStatus2       (*(volatile unsigned *)0x49000058)

#define rSRCPND            (*(volatile unsigned *)0x4A000000)
#define rINTMOD            (*(volatile unsigned *)0x4A000004)
#define rINTMSK            (*(volatile unsigned *)0x4A000008)
#define rPRIORITY          (*(volatile unsigned *)0x4A00000C)
#define rINTPND            (*(volatile unsigned *)0x4A000010)
#define rINTOFFSET      (*(volatile unsigned *)0x4A000014)
#define rSUBSRCPND         (*(volatile unsigned *)0x4A000018)
#define rINTSUBMSK         (*(volatile unsigned *)0x4A00001C)

#define rULCON0            (*(volatile unsigned *)0x50000000)
#define rUCON0             (* (volatile unsigned *)0x50000004)
#define rUFCON0            (*(volatile unsigned *)0x50000008)
#define rUMCON0            (*(volatile unsigned *)0x5000000C)
#define rUTRSTAT0          (*(volatile unsigned *)0x50000010)
#define rUERSTAT0          (*(volatile unsigned *)0x50000014)
#define rUFSTAT0       (*(volatile unsigned *)0x50000018)
#define rUMSTAT0       (*(volatile unsigned *)0x5000001C)
#define rUBRDIV0       (*(volatile unsigned *)0x50000028)
#define rULCON1            (*(volatile unsigned *)0x50004000)
#define rUCON1           ( *(volatile unsigned *)0x50004004)
#define rUFCON1            (*(volatile unsigned *)0x50004008)
#define rUMCON1            (*(volatile unsigned *)0x5000400C)
#define rUTRSTAT1          (*(volatile unsigned *)0x50004010)
#define rUERSTAT1          (*( volatile unsigned *)0x50004014)
#define rUFSTAT1        (*(volatile unsigned *)0x50004018)
#define rUMSTAT1        (*(volatile unsigned *)0x5000401C)
#define rUBRDIV1        (*(volatile unsigned *)0x50004028)
#define rULCON2            (*(volatile unsigned *)0x50008000)
#define rUCON2           (*(volatile unsigned *)0x50008004)
#define rUFCON2            (*(volatile unsigned *)0x50008008)
#define rUTRSTAT2        (*(volatile unsigned *)0x50008010)
#define rUERSTAT2        (*(volatile unsigned *)0x50008014)
#define rUFSTAT         2 ( *(volatile unsigned *)0x50008018)
#define rUBRDIV2         (*(volatile unsigned *)0x50008028)
#ifdef __BIG_ENDIAN
#define rUTXH0            (*(volatile unsigned char *)0x50000023)
#define rURXH0            (*(volatile unsigned char *)0x50000027)
#define rUT XH1            (* (volatile unsigned char *)0x50004023)
#define rURXH1            (*(volatile unsigned char *)0x50004027)
#define rUTXH2            (*(volatile unsigned char *)0x50008023)
#define rURXH2            (*(volatile unsigned char *)0x50008027)
#define Wr UTXH0 (ch)        (*(volatile unsigned char *)0x50000023)=(unsigned char)(ch)
#define RdURXH0()          (*(volatile unsigned char *)0x50000027)
#define WrUTXH1(ch)       (*(volatile unsigned char *)0x50004023)=(unsigned char)(ch)
#define RdURXH1()          (*(volatile unsigned char *)0x50004027)
#define WrUTXH2(ch)        (*(volatile unsigned char *)0x50008023)= (unsigned char)(ch)
#define RdURXH2()          (*(volatile unsigned char *)0x50008027)
#define UTXH0            (0x50000020+3)
#define URXH0            (0x50000024+3)
#define UTXH1            (0x50004020+3)
#define URXH1            ( 0x50004024+3)
#define UTXH2            (0x50008020+3)
#define URXH2            (0x50008024+3)
#else
#define rUTXH0            (*(volatile unsigned char *)0x50000020)
#define rURXH0            (*(volatile unsigned char *)0x50000024)
#define rUTXH1            (*(volatile unsigned char *)0x50004020)
# rURXH1            (*(volatile unsigned char *)0x50004024)
#define rUTXH2            (*(volatile unsigned char *)0x50008020)
#define rURXH2            (*(volatile unsigned char *)0x50008024)
#define WrUTXH0(ch)        (*(volatile unsigned char define *)0x50000020)=(unsigned char)(ch)
#define RdURXH0()          (*(volatile unsigned char *)0x50000024)
#define WrUTXH1(ch)        (*(volatile unsigned char *)0x50004020)=(unsigned char)(ch)
#define RdURXH1()          ( *(volatile unsigned char *)0x50004024)
#define WrUTXH2(ch)        (*(volatile unsigned char *)0x50008020)=(unsigned char)(ch)
#define RdURXH2()          (*(volatile unsigned char *)0x50008024)
#define UTXH0            (0x50000020)    
#define URXH0            (0x50000024)
#define UTXH1            (0x50004020)
#define URXH1            (0x50004024)
#define UTXH2            (0x50008020)
#define URXH2            (0x50008024)
#endif

#define rTCFG0             (*(volatile unsigned *)0x51000000)
#define rTCFG1             (*(volatile unsigned *)0x51000004)
#define rT CON              (*( volatile unsigned *)0x51000008)
#define rTCNTB0            (*(volatile unsigned *)0x5100000C)
#define rTCMPB0            (*(volatile unsigned *)0x51000010)
#define rTCNTO0            (*(volatile unsigned *)0x51000014)
#define rTCNTB1            (*(volatile unsign ed *)0x51000018)
#define rTCMPB1            (*(volatile unsigned *)0x5100001C)
#define rTCNTO1            (*(volatile unsigned *)0x51000020)
#define rTCNTB2            (*(volatile unsigned *)0x51000024)
#define rTCMPB2            (*(volatile unsigned *) 0x51000028)
#define rTCNTO2            (*(volatile unsigned *)0x5100002C)
#define rTCNTB3            (*(volatile unsigned *)0x51000030)
#define rTCMPB3            (*(volatile unsigned *)0x51000034)
#define rTCNTO3            (*(volatile unsigned *)0x51000038)
#define rTCNTB4            (*(volatile unsigned *)0x5100003C)
#define rTCNTO4            (*(volatile unsigned *)0x51000040)