Analysis of the underlying working principle of MCS-51 microcontroller 1

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   I studied MCU for 2 years in college and have used MCU for almost 2 years, but I still have a little fuzzy about its detailed internal workings (maybe the usual application does not involve the underlying working principles, most of the work is done by the compiler and assembler for us, which also hinders our understanding of the underlying working principles). I have been developing for so many years without knowing the reason, and I have many questions in my heart, and I also feel like I am being ignored. Maybe I prefer to be down-to-earth, so I have always wanted to understand the internal principles. Here are a few points.

   First, let's analyze the general working principle of the microcontroller (general processor). We have all learned simple addition circuits, counting circuits, memory read and write circuits and other sequential circuits with specific functions. These are simple applications in the sequential circuit course of digital circuits. We can understand the microcontroller as a more complex digital circuit composed of these basic sequential circuits. Under the normal program execution process, the microcontroller automatically counts PC under the promotion of clock timing, and the controller reads the program code from the program memory ROM according to the PC value (the storage space of an instruction may occupy one byte, two bytes, and a maximum of three bytes). After decoding the program code, the specific operation mode (such as MOV operation) and operands (such as RO, R1) can be obtained.

   Secondly, let's understand the instruction system. We can understand an instruction of the MCU as a small executable process supported by the MCU. Of course, this process requires the support of the internal process and hardware of the MCU (so the instructions of the general MCU instruction system are limited, such as the 51 MCU supports 111 instructions). We can understand that the more instructions a series of MCUs have (of course, the instructions here are all meaningful instructions), the more flexible and efficient the MCU will be. Of course, this also requires higher hardware requirements for the processor inside the MCU, which is also one of the factors that restrict the efficient processing of the MCU. However, some high-end MCU series such as the ARM series MCU are already very efficient in terms of instruction systems.

   We all know that storing instructions requires storage space, that is, the internal ROM, and executing instructions requires execution time, that is, the instruction cycle. For the 111 instructions in the 51 microcontroller, a maximum of three bytes of storage space are occupied, and the maximum program execution cycle of the instruction is four clock cycles (i.e., multiplication and division instructions). The storage space here refers to the storage space occupied by the machine code after the assembly code is assembled into machine code. Here we may think that a machine language must contain enough information so that the microcontroller can run the program according to the instruction. For example, MOV ACC #0xff   must occupy more than two bytes for this statement, because the data "0xff" occupies one byte, and the operation mode MOV and ACC two information need to be stored. However, if you want to assign a value of 0xffff to an address such as 0xffff, then this understanding does not mean that it will occupy at least 5 bytes (4 bytes to store the operation address and operand respectively, and 1 byte to store the operation mode). Maybe the masters saw the problem at once, but I thought about it this way at the beginning. The 51 instruction system does not have any direct instructions to assign a 16-bit number to a 16-bit address (I admit I thought too much at the time). This requires a combination of many instructions to complete the operation, so the internal storage method is the storage method of many instructions together (probably far more than 5 bytes). This is also the subtlety of the instruction system. It must consider both storage space and execution cycle, as well as the comprehensiveness of instruction functions.

   In the 51 series MCU, two bytes of code can be read at the same time in one cycle, which reduces the execution cycle of double-byte instructions to a certain extent compared to the method of reading one byte in one cycle. Since reading a three-byte instruction takes at least two cycles, the execution cycle of a three-byte instruction must be two cycles or more.

Analysis of the underlying working principle of MCS-51 microcontroller 1Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1
Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1

Analysis of the underlying working principle of MCS-51 microcontroller 1
 

   The above are the assembly instruction codes, machine codes and machine execution cycles corresponding to each instruction, which helps to understand the details of the instruction.

   Different instructions in the instruction system have different addressing modes. This is a set of mechanisms for data processing inside the microcontroller. Any other operations are based on this mechanism. Therefore, understanding the instruction system helps to understand and apply the detailed working process inside the microcontroller.

Keywords:MCS-51 Reference address:Analysis of the underlying working principle of MCS-51 microcontroller 1

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