Overview of MCS-51 single-chip microcomputer instruction system 1

MCS-51 has a total of 111 instructions, which can be divided into 5 categories:
    [1]. Data transfer instructions (29 in total)
     [2]. Arithmetic operation instructions (24 in total)
     [3]. Logical operation and shift instructions (24 in total)
     [4]. Control transfer instructions (17 in total)      [5]. Boolean variable operation instructions (17 in total)

      The meaning of some special symbols

    Before introducing the instruction system, let us first understand the meaning of some special symbols, which will be very useful for future program writing.
    Rn——8 working registers R0-R7 (n=0-7) in the currently selected register area.
    Ri——Two registers R0 and R1 (i=0,1) in the currently selected register area that can be used as address registers.
    direct——8-bit address of internal data storage unit. Contains 0-127(255) internal storage unit addresses and special function register addresses.
    #data——8-bit constant in instruction.
    #data16——16-bit constant in instruction.
    addr16——16-bit destination address used in LCALL and LJMP instructions. The destination address space is 64kB program memory address.
    #addr11——11-bit destination address used in ACALL and AJMP instructions. The destination address must be placed in the same 2kB program memory space as the first byte of the next instruction.
    rel——8-bit signed offset byte, used in all conditional transfer and SJMP instructions. The offset byte is in the range of -128-+127 from the first byte of the next instruction.

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    @—Prefix for indirect register addressing or base register.
    /—Prefix for operation, declaring the inversion of the bit operand.
    DPTR—Data pointer.
    bit—Direct addressing bit of internal RAM and special function register.
    A—Accumulator.
    B—Accumulator B. Used in multiplication and division instructions.
    C—Carry flag.
    (x)—Contents in a certain address unit.
    ((x))—Contents in the unit addressed by X. The "address" of

     the addressing mode of MCS-51

    is the address of the unit where the operand is located. Operands are required when executing most instructions. So where do we get the operands? The easiest thing to think of is to tell the CPU the address unit where the operand is located, from where the corresponding operand can be obtained. This is the meaning of "addressing". MCS-51 has many addressing modes, which are quite convenient to use, powerful and flexible. This is one of the reasons why the MCS-51 instruction system is "easy to use". Let's discuss the principles of several addressing modes below.

    [1].
    In direct addressing instructions, the operand appears directly in the form of a unit address. For example, the instruction

        MOV   A,68H

    means to transfer the data content of unit 68H in the internal RAM to accumulator A. It is worth noting that direct addressing can only use 8-bit binary addresses, so this addressing method is limited to addressing the internal RAM. The lower 128-bit unit is given directly in the form of a unit address in the instruction. Special function registers can be accessed using their direct addresses or given in their symbolic form, but special function registers can only be accessed using direct addressing, and there is no other way.

    [2]. Register addressing
    Register addressing operates on the selected 8 working registers R0-R7, that is, the operand is in the register, so specifying the register will get the operand. In register addressing instructions, the register is represented by the register symbol. For example, the instruction

        MOV   A,R1

    means to send the content of R3 in the working register group used to accumulator A.
    It is worth mentioning that the selection of the working status register is controlled by the program status word register. Before this instruction, the current working register group should be set through PSW.

    [3]. Register indirect addressing In
    register addressing mode, the register stores the operand, while in register indirect addressing mode, the register stores the address of the operand, that is, the operand is obtained through the address unit pointed to by the register, which is the origin of the name of register indirect addressing.
    For example, the instruction:

        MOV   A, @R0

    means that the content in the address unit pointed to by the R0 register is sent to the accumulator A. If R0=#56H, then the data in the 56H unit is sent to the accumulator A.
    Register indirect addressing can be used to access internal RAM or external data memory. When accessing the lower 256 bytes of internal RAM or external data memory, R0 and R1 can be used as indirect registers. However, it is necessary to point out that the address of the upper 128 bytes of the internal RAM overlaps with the address of the dedicated accumulator, so this addressing mode cannot be used to access special function registers.
    The space of external data memory is 64kB. At this time, DPTR can be used as an indirect address register for access. The instruction is as follows: MCU Design

        MOVX   A, @DPTR

    The meaning of this instruction is similar to the above, so it will not be repeated.

    [4]. Immediate addressing
    Immediate addressing is to give the operand directly in the instruction, that is, the operand is included in the instruction. The instruction opcode is followed by the operand. The operand in the instruction is generally called an immediate number, hence the name. In order to distinguish it from the direct addressing method, add a "#" symbol before the immediate number. For example:

        MOVX   A, #0EH

    The meaning of this instruction is to send the operand 0EH to the accumulator A.

    [5]. Displacement addressing
    Displacement addressing uses DPTR or PC as the base register and accumulator A as the displacement register. The contents of the two registers are added to form a 16-bit address to form the actual address of the operand. For example:

        MOV    A, @A + DPTR
        MOVX   A, @A + PC
        JMP    @A + DPTR

    In these three instructions, A is used as an offset register, DPTR or PC is used as a displacement register, and A is used as an unsigned number to add the content of DPTR or PC to obtain the actual address to be accessed. The first two are program memory read instructions, and the last one is an unconditional transfer instruction.

    [6]. Bit addressing
    In the MCS-51 microcontroller, the bit address corresponding to the byte unit 20H-2FH in the RAM is 00H-7FH. Some bits in the special function register can also be addressed. These units can be accessed by either byte or bit addressing.

    [7]. Relative addressing
    The relative addressing method is designed for relative transfer of programs. It uses the content of PC as the base address and adds the given offset as the transfer address to achieve program transfer. The destination address of the transfer can be found in the following expression:

        Destination address = transfer instruction address + transfer instruction word number + offset.

    It is worth noting that the offset has a positive or negative sign, and the offset value range is between -128 and +127 of the current PC value.

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      MCS-51 Data Transfer Instructions

      There are 29 data transfer instructions. The general operation of data transfer instructions is to transfer the source operand to the destination operand. After the instruction is executed, the source operand remains unchanged and the destination operand is equal to the source operand. If the destination operand is required not to be lost during data transfer, direct transfer instructions cannot be used, and exchange-type data transfer instructions should be used. Data transfer instructions do not affect flags C, AC and OV, but may affect the parity flag P.

    [1].  Instructions with accumulator A as the destination operand (4 instructions)
    The function of these 4 instructions is to send the content pointed to by the source operand to accumulator A. There are direct, immediate, register and register indirect addressing modes:

        MOV   A,data      ; (data) → (A) The content in the direct unit address is sent to accumulator A
        MOV   A,#data     ; #data → (A) The immediate value is sent to accumulator A
        MOV   A,Rn       ; (Rn) → (A) The content in Rn is sent to accumulator A

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        MOV   A,@Ri      ; ((Ri)) → (A) The content of the address unit pointed to by the content of Ri is sent to the accumulator A

    [2].  Instructions with register Rn as the destination operand (3 instructions)
    The function of these 3 instructions is to send the content specified by the source operand to the selected working register Rn. There are direct, immediate and register addressing modes:

        MOV   Rn,data      ; (data) → (Rn) The content of the direct addressing unit is sent to register RnMOV Rn
        ,   #data     ; #data → (Rn) The immediate data is directly sent to register RnMOV
        Rn   ,A         ; (A) → (Rn) The content of accumulator A is sent to register Rn

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    [3].  Instructions with direct address as destination operand (5 instructions)
    The function of this group of instructions is to send the content specified by the source operand to the on-chip RAM selected by the direct address data. There are four addressing modes: direct, immediate, register and register indirect:

        MOV   data,data    ; (data) → (data) The content in the direct address unit is sent to the direct address unit
        MOV   data,#data; #data → (data) The immediate data is sent to the direct address unit
        MOV   data,A      ; (A) → (data) The content in accumulator A is sent to the direct address unit
        MOV   data,Rn     ; (Rn) → (data) The content in register Rn is sent to the direct address unit Electronic components mail order
        MOV   data,@Ri    ; ((Ri)) → (data) The data in the address unit specified by the content in register Ri is sent to the direct address unit

    [4].  Instructions with indirect address as destination operand (3 instructions)
    The function of this group of instructions is to send the content specified by the source operand to the on-chip RAM with the content in Ri as the address. There are three addressing modes: direct, immediate and register:

        MOV   @Ri,data     ; (data) → ((Ri)) The content in the direct address unit is sent to the RAM unit with the content in Ri as the address
        MOV   @Ri,#data    ; #data → ((Ri)) The immediate value is sent to the RAM unit with the content in Ri as the address
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    [5].  Table lookup instructions (2 instructions)
    The function of this group of instructions is to search and transfer the data table stored in the program memory, using the displacement addressing mode:

        MOVC   A,@A+DPTR    ; ((A)) + (DPTR) → (A) The content in the table address unit is sent to accumulator A
        MOVC   A,@A+PC      ; ((PC)) + 1 → (A), ((A)) + (PC) → (A) The content in the table address unit is sent to accumulator A

    [6].  Instructions for transferring data between accumulator A and external data memory RAM (4 instructions)
    These 4 instructions are used to transfer data between accumulator A and external RAM. Using register addressing mode:

        MOVX   @DPTR,A     ; (A) → (DPTR) The contents of the accumulator are sent to the address of the external RAM pointed to by the data pointer. Recommended electronic production mail order website: www.hpoo.net
        MOVX   A, @DPTR    ; (DPTR) → (A) The contents of the external RAM address pointed to by the data pointer are sent to the accumulator A.
        MOVX   A, @Ri      ; (Ri) → (A) The contents of the external RAM address pointed to by register Ri are sent to the accumulator A.
        MOVX   @Ri,A       ; (A) → (Ri) The contents of the accumulator are sent to the address of the external RAM pointed to by register Ri.

    [7].  Stack operation instructions (2)
    The function of these 4 types of instructions is to transfer the contents of the directly addressed unit to the unit pointed to by the stack pointer SP, and to send the contents of the unit pointed to by SP to the directly addressed unit. There are only two instructions of this type. The first one below is often called the push operation instruction, and the second one is called the pop operation instruction. It should be pointed out that after the microcontroller is powered on and reset, (SP) defaults to 07H, but it generally needs to be reassigned to set a new SP address. The first data pushed into the stack must be stored in the storage unit pointed to by SP+1, so the actual bottom of the stack is the storage unit pointed to by SP+1. Microcontroller programmer HPOO

        PUSH   data    ; (SP) + 1 → (SP), (data) → (SP) The stack pointer is first increased by 1, and the data in the direct addressing unit is sent to the unit pointed to by the stack pointer SP
        POP   data     ; (SP) → (data) (SP) -1 → (SP), the data in the unit pointed to by the stack pointer SP is sent to the direct addressing unit, and the stack pointer SP is then decremented by 1

    [8].  Exchange instructions (5 instructions)
    The function of these 5 instructions is to exchange the contents of the accumulator A with the data pointed to by the source operand.

        XCH   A,Rn     ; (A) ←→ (Rn) The contents of the accumulator and the working register Rn are exchanged.
        XCH   A,@Ri    ; (A) ←→ ((Ri)) The contents of the storage unit pointed to by the accumulator and the working register Ri are exchanged.
        XCH   A,data   ; (A) ←→ (data) The contents of the accumulator and the direct address unit are swapped.
        XCHD   A, @Ri   ; (A3-0) ←→ ((Ri) 3-0) The contents of the accumulator and the storage unit pointed to by the working register Ri are swapped in the lower half byte.
        SWAP   A       ; (A3-0) ←→ (A7-4) The contents of the accumulator are swapped in the upper and lower half bytes

    . [9]  16-bit data transfer instructions (1)
    The function of this instruction is to send a 16-bit constant to the data pointer register.

        MOV   DPTR, #data16   ; #dataH→ (DPH), #dataL→ (DPL) The upper 8 bits of the 16-bit constant are sent to DPH, and the lower 8 bits are sent to DPL