1.1. In the MCS-51 system, when the PSEN signal is valid, it means that the CPU wants to read information from the (external program memory) memory.
1.2. When RS1RS0=10 in PSW, the address of R2 is (12H); when RS1RS0=11, the address of R2 is (1AH).
1.3. One machine cycle = 12 (oscillation cycles) = 6 (state cycles/clock cycles).
1.4. In the MCS-51 microcontroller, if a 9MHz crystal oscillator is used, one machine cycle is (1.5)us.
1.5. If (DPTR) = 2000H, (A) = 50H, after executing the instruction "MOVC A, @A + DPTR", the content of the program memory (2050H) unit is sent to A.
1.6. Assuming that the accumulator (A) = 50H, after executing the instruction "MOVC A, @A+PC" at the unit 2000H of the program memory, the content of the unit (2051H) of the program memory is sent to A.
1.7. To access the internal RAM, use the MOV instruction, to access the external RAM, use the (MOVX) instruction, to access the internal ROM, use the (MOVC) instruction, to access the external ROM, use the (MOVC) instruction.
1.8. The instruction "ORL A, #0F0H" sets the high 4 bits of A to 1, while the low 4 bits remain unchanged.
1.9. After executing the "ANL A, #0FH" instruction, the upper 4 bits of accumulator A = (0000B).
1.10. If the instruction opcode address of "SJMP rel" is 1000H, rel=50H, then its transfer target address is (1052H).
1.11. Assume that (A) = 54. After executing the instruction "ADD A, #65", the content of accumulator A is (01110111B) and the content of CY is (0).
1.12. The MCS-51 single-chip microcomputer system with a main frequency of 12MHz uses T0 mode 1 for timing of 1ms, so the time constant should be (64536).
1.13. Assume that (A) = 86H.
2. Multiple choice questions
2.1. When MCS-51 is reset, the correct statement is (A).
2.2. When PSW = 01H, the current working register is (B).
2.3. The ALE pin of the single-chip microcomputer 8031 is (C).
2.4. If PSW.4=0, PSW.3=1, to push the contents of register R0 onto the stack, use the (D) instruction.
3. Short answer questions
3.1. Briefly describe the control signals used to read external ROM and read and write external RAM.
Answer: ①ALE: When the CPU accesses external program or data memory, this signal serves as the control signal to latch the lower 8-bit address.
3.2. Briefly describe the four modes of 89C51 serial communication and their characteristics.
Answer: Mode 0: Synchronous shift register input/output mode, often used to expand I/O ports. The baud rate is fixed to 1/12 of the oscillation frequency and is not affected by the SMOD bit in the PCON register.
4. Programming and Application
4.1、Programming to implement c=a*a+b*b. Assume that a and b are both less than 10, a is stored in unit 31H, b is stored in unit 32H, and c is stored in unit 33H.
4.2. Combine the two half-byte numbers into a one-byte number. Combine the lower 4 bits of the contents in the on-chip RAM 50H and 51H addresses, and store the result in the on-chip RAM 52H address.
4.3. D1 and K1 are connected as shown in the attached figure.
① Try programming to implement the following control: D1 lights up initially, and then D1 changes state once each time the switch is pressed.
② Try programming to implement the following control: D1 lights up initially, and then when the switch is closed, D1 changes its state every 250 milliseconds, and when the switch is opened, D1 maintains the last state without changing (assuming the crystal oscillator frequency = 3MHz).
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