As shown in the following figure: We need to pay attention to the concepts of several clocks.
#define CLOCK_SETUP 1 #define MAIN_PLL_SETUP 1 #define MAIN_CLKSRCSEL_Val 0x00000001 #define MAIN_PLL_M_Val 0x00000003 #define MAIN_PLL_P_Val 0x00000001 #define SYS_AHB_DIV_Val 1 /* 1 through 255, typical is 1 or 2 or 4 */ #define XTAL (12000000UL) /* Oscillator frequency */ #define OSC_CLK ( XTAL) /* Main oscillator frequency */ #define IRC_OSC (12000000UL) /* Internal RC oscillator frequency */ #define WDT_OSC ( 250000UL) /* WDT oscillator frequency */ uint32_t ClockSource = IRC_OSC; uint32_t SystemFrequency = IRC_OSC; /*!< System Clock Frequency (Core Clock) */ uint32_t SystemAHBFrequency = IRC_OSC; void Main_PLL_Setup ( void ) { uint32_t regVal; ClockSource = OSC_CLK; LPC_SYSCON->SYSPLLCLKSEL = MAIN_CLKSRCSEL_Val; /* Select system OSC--system oscillator*/ LPC_SYSCON->SYSPLLCLKUEN = 0x01; /* Update clock source */ LPC_SYSCON->SYSPLLCLKUEN = 0x00; /* toggle Update register once */ LPC_SYSCON->SYSPLLCLKUEN = 0x01; while ( !(LPC_SYSCON->SYSPLLCLKUEN & 0x01) ); /* Wait until updated */ regVal = LPC_SYSCON->SYSPLLCTRL; regVal &= ~0x1FF; LPC_SYSCON->SYSPLLCTRL = (regVal | (MAIN_PLL_P_Val<<5) | MAIN_PLL_M_Val);/* P=1, M=4 FCLKOUT=12*4=48Mhz */ /* Enable main system PLL, main system PLL bit 7 in PDRUNCFG. */ LPC_SYSCON->PDRUNCFG &= ~(0x1<<7); /* Write 0 to the seventh bit of PDRUNCFG, i.e. the system PLL is powered on*/ while ( !(LPC_SYSCON->SYSPLLSTAT & 0x01) ); /* Wait until it's locked. Execute the following code after confirming that PLL is locked.*/ LPC_SYSCON->MAINCLKSEL = 0x03; /* Select PLL clock output--Select PLL output as the main clock*/ LPC_SYSCON->MAINCLKUEN = 0x01; /* Update MCLK clock source -- allows updating the main clock */ LPC_SYSCON->MAINCLKUEN = 0x00; /* Toggle update register once */ LPC_SYSCON->MAINCLKUEN = 0x01; while ( !(LPC_SYSCON->MAINCLKUEN & 0x01) ); /* Wait until updated. After confirming that the main clock is locked, execute the following steps*/ LPC_SYSCON->SYSAHBCLKDIV = SYS_AHB_DIV_Val; /* SYS AHB clock, typical is 1 or 2 or 4 --The value of SYSAHBCLKDIV is 1, which means no frequency division, so the AHB clock is set to 48Mhz */ #if MAIN_PLL_SETUP SystemFrequency = ClockSource * (MAIN_PLL_M_Val+1); #else SystemFrequency = ClockSource; #endif SystemAHBFrequency = (uint32_t)(SystemFrequency/SYS_AHB_DIV_Val); return; } /** * Initialize the system * * @param none * @return none * * @brief Setup the microcontroller system. * Initialize the System and update the SystemFrequency variable. */ void SystemInit (void) { uint32_t i; #ifdef __DEBUG_RAM LPC_SYSCON->SYSMEMREMAP = 0x1; /* remap to internal RAM */ #else #ifdef __DEBUG_FLASH LPC_SYSCON->SYSMEMREMAP = 0x2; /* remap to internal flash */ #endif #endif #if (CLOCK_SETUP) /* Clock Setup */ /* bit 0 default is crystal bypass, bit1 0=0~20Mhz crystal input, 1=15~50Mhz crystal input. */ LPC_SYSCON->SYSOSCCTRL = 0x00; /* main system OSC run is cleared, bit 5 in PDRUNCFG register */ LPC_SYSCON->PDRUNCFG &= ~(0x1<<5); /* Write 0 to the fifth bit of PDRUNCFG, which means the system oscillator is powered on*/ /* Wait 200us for OSC to be stablized, no status indication, dummy wait. */ for ( i = 0; i < 0x100; i++ ); #if (MAIN_PLL_SETUP) Main_PLL_Setup(); #endif #endif /* endif CLOCK_SETUP */ /* System clock to the IOCON needs to be enabled or most of the I/O related peripherals won't work. */ LPC_SYSCON->SYSAHBCLKCTRL |= (1<<16); //Enable the clock of the IO module return; }
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