Asynchronous full-color LED display controller solution

　　1 LED display market overview

　　Full-color LED displays are widely used in outdoor and indoor large-scale advertisements, stage backgrounds and other occasions (mostly synchronous display). As the price drops, full-color LED displays have begun to be used in door lintel advertisements (asynchronous display). Currently, door lintel advertisements generally use single-color and double-color LED displays, and the market demand is large. Compared with single-color and double-color LEDs, full-color LEDs can display richer content, such as true color pictures, animations, videos, etc. Full-color LED displays will be the development trend of door lintel advertising screens.

　　Figure 1: China’s LED display output value (data source: GLII)

　　2 Introduction of popular solutions in the market

　　The more popular solutions on the market are as follows:

　　1) ARM-CortexA8 + FPGA solution:

　　Figure 2: ARM-CortexA8 + FPGA solution block diagram

　　Features: It has a full range of functions, and the ARM Cortex-A8 can decode mainstream video formats. However, the solution cost is relatively high, which is a bit wasteful for small-screen display scenarios such as door lintel advertising.

　　2) ARM Cortex-M4 solution:

　　Figure 3: ARM Cortex-M4 solution block diagram

　　Features: The structure is simple, but because FPGA is not used, the real-time performance and speed of ARM Cortex-M4 cannot meet the control requirements of full-color LED display, so it can only achieve "seven-color" display, but not full-color display in the true sense. [page]

　　3) FPGA solution:

　　Figure 4: Block diagram of a single FPGA solution

　　Features: It is a derivative product of the synchronous full-color control system, which realizes simple recording and has relatively single functions.

　　3 Jingwei Yager SoC FPGA Solution

　　Jingwei Yager CME-M5 series FPGA integrates enhanced 8051 MCU, compatible with standard 8051 instruction set, 12 times the MIPS of standard 8051, frequency up to 200MHz, supports up to 8MB data and code space expansion, supports hardware 32/16-bit MDU (Multiplication Division Unit), 128K Byte SPRAM, can be used as 8051 code or data storage, integrated on-chip debugging system OCDS, supports JTAG online debugging; peripherals include 3 16-bit timers, 1 16-bit watchdog, 1 I2C interface, 1 SPI interface, 2 USART interfaces, 1 RTC real-time clock, 8-channel DMA; supports STOP, IDLE power management mode. Supports system programming based on MSS (Microcontroller Subsystem), system multi-configuration, system online update, dynamic frequency switching and other features. See Figure 5 for the internal structure diagram of CME-M5.

　　Figure 5: Block diagram of the CME-M5 device

　　In this design, the enhanced 8051 implements the Ethernet TCP/IP protocol stack, accesses the NandFlash/SD card, displays special effects, and schedules the FPGA function module to implement LED display. The FPGA is responsible for LED refresh control, and its functions include: grayscale control, refresh rate control, brightness control, gamma correction, etc. The PC provides human-computer interaction, allowing users to edit the "program" through the host computer software, that is, the content that needs to be displayed on the LED screen in the end, including text, pictures, videos, and display effects, such as blinds, running water, etc.; finally, the host computer software converts the "program" into a specific data file and transmits it to CME-M5 via Ethernet, and CME-M5 writes the received data file to the NandFlash/SD card. The system block diagram is as follows:

　　Figure 6: Block diagram of CME-M5-based solution

　　CME-M5 FPGA Functional Description

　　1) Gamma Correction

　　According to the response characteristics of the LED, the input 8-bit grayscale value needs to be gamma corrected to map it to 14-16-bit grayscale values. This function is implemented by FPGA through table lookup. The gamma correction parameters can be modified through the PC host computer.

　　2) Grayscale control

　　The following uses 8-bit/256-level grayscale as an example to explain the LED grayscale control principle. For RGB three-primary color LED display, 256-level grayscale means that R, G, and B each use 8 bits to represent the grayscale value (2^8=256, i.e. 256-level grayscale). Each LED has independent R, G, and B signals for FPGA to control separately. [page]

　　Full-color LED driver chips are usually divided into constant current sources with built-in PWM and constant current sources without PWM. Next, the grayscale control principle is introduced by taking the driver chip MBI5024 without PWM as an example. The internal structure block diagram of MBI5024 is shown in Figure 7. FPGA sends the R/G/B grayscale value of each pixel to SDI, OUT0~OUT15 connects the R/G/B of the LED, and OE_n controls the length of time the LED is lit corresponding to each bit of grayscale value. 8bit/256-level grayscale control usually uses 19 fields. Assuming that the period of the subfield is T, the total time of a refresh cycle is 19T. 19 fields are divided into 8 parts, and the time is 8T, 4T, 2T, 1T, 1T, 1T, 1T, 1T; OE_n effective time is 8T, 4T, 2T, 1T, 1/2T, 1/4T, 1/8T, 1/16T respectively.

　　The following describes how to control the grayscale of R. The grayscale control principles of G and B are similar. 8T corresponds to the highest bit R［7］ of the 8-bit grayscale value, and its refresh time length is 8T; 4T corresponds to the second highest bit R［6］ of the 8-bit grayscale value, and its refresh time length is 4T...1/16T corresponds to the lowest bit R［0］, and its refresh time length is 1/16T. As shown in Figure 8, R［7］ is sent in the T0 cycle, R［6］ is sent in the T1 cycle, R［5］ is sent in the T2 cycle...R［0］ is sent in the T7 cycle.

　　OUT0~OUT15 are connected to the R of the 0th to 15th LEDs respectively. Use Ri［j］ to represent the jth bit of the R grayscale value of the i-th LED. The following is the operation flow:

　　1. SDI is shifted in {R0［7］, R1［7］, R2［7］, R3［7］, R4［7］, R5［7］, R6［7］, R7［7］, R8［7］, R9［7］, R10［7］, R11［7］, R12［7］, R13［7］, R14［7］, R15［7］}; R15［7］ is shifted in first and R0［7］ is shifted in last;

　　2. Enable the LE signal to latch R0［7］~R15［7］, enable the OE_n signal, and keep it for 8T (T0 period in the timing diagram). During this process, SDI shifts in the grayscale data of R0［6］~R15［6］;

　　3. Enable the LE signal to latch R0［6］~R15［6］, enable the OE_n signal, and keep it for 4T (T1 cycle in the timing diagram). During this process, SDI shifts in and latches the grayscale data of R0［5］~R15［5］;

　　4. …

　　5. Enable the LE signal to latch R0［3］~R15［3］, enable the OE_n signal, and keep it for 1/2T (that is, the T4 period in the timing diagram). After 1/2T, set the OE_n signal to invalid. During this process, SDI shifts in and latches the grayscale data of R0［2］~R15［2］;

　　6. …

　　7. Enable the LE signal to latch R0［0］~R15［0］, enable the OE_n signal, and keep it for 1/16T (that is, T7 cycle in the timing diagram), and then set the OE_n signal to invalid; at this point, a refresh cycle of grayscale display is completed;

　　It should be noted that the above only takes 16 LEDs as an example. In actual applications, multiple MBI5024 chips will be cascaded, that is, the SDO of the upper-level MBI5024 chip is connected to the SDI of the lower-level MBI5024. When there are N MBI5024 cascaded, it is equivalent to an N*16-bit shift register, which can connect the R/G/B of N*16 LEDs at most. The operation process is similar to the 7 steps described above.

　　Figure 7: MBI5024 device block diagram

　　Figure 8: 8-bit/256-level grayscale control timing diagram

　　In one grayscale refresh cycle (19T), the total effective time of OE is: 8T + 4T + 2T + 1T + 1/2T + 1/4T + 1/8T + 1/16T = 15.9375T, and the brightness utilization rate is: 15.9375T/(19T)*100%=83.88%, that is, the brightness loss is 1 - 83.88% = 16.12%.

　　For 16bit/65536-level grayscale, the commonly used 27 sub-field method is: 8T, 4T, 2T, T, T, T, T, T, T, T, T, T, T, T, T; the effective time of OE_n is 8T, 4T, 2T, 1T, 1/2T, 1/4T, 1/8T, 1/16T, 1/32T, 1/64T, 1/128T, 1/256T, 1/512T, 1/1024T, 1/2048T, 1/4096T; the brightness utilization rate is: 15.999755859375 T/(27T)*100%=59.26%, and the brightness loss is 1 - 59.26% = 40.74%.

　　Using different numbers of sub-fields, the brightness utilization is different. For example, 16bit/65536-level grayscale can also adopt 42 sub-fields, that is, 16T, 8T, 4T, 2T, T, T, T, T, T, T, T, T, T, T, T; the effective time of OE_n is 16T, 8T, 4T, 2T, T, 1/2T, 1 /4T, 1/8T, 1/16T, 1/32T, 1/64T, 1/128T, 1/256T, 1/512T, 1/1024T, 1/2048T, and the brightness utilization is: 31.99951171875 T/(42T) *100%=59.26%=76.19%, and the brightness loss is 1 - 76.19%=23.81%.

　　3) Refresh rate

　　After the data clock frequency of the driver chip, the scanning mode of the LED screen (static ~ 16 scans) and the addressing number are fixed, the sub-field time T is also determined. Taking 16bit/65536 grayscale as an example, if 27 sub-fields are used, the refresh rate is approximately: F=1/(27*T), and the minimum OE_n pulse width is T/4096; if 42 sub-fields are used, the refresh rate is approximately: F=1/(42*T), and the minimum OE_n pulse width is T/2048. Taking into account other time overheads, the actual refresh rate F will be slightly lower than the above estimated value.

　　It can be seen that when the sub-field time T is constant, the refresh rate of the latter (42T) is lower than that of the former (27T), but the brightness utilization rate is higher than that of the former, and the minimum pulse width of OE_n is longer than that of the former (for the driver chip, the minimum pulse width of OE_n is limited. When the pulse width is too narrow, the driver chip will not be able to recognize it). Therefore, the specific design needs to be weighed according to the actual situation. In order to improve the visual refresh rate (Visual Refresh Rate), the high bits of the grayscale value can be broken up into multiple segments and distributed in the refresh cycle; for the dynamic scanning screen, all sub-fields that realize the grayscale value can also be divided into multiple parts. When refreshing each row, only a part of the grayscale is refreshed to speed up the switching speed from one row to the next. After all rows have refreshed a part of the grayscale, the other parts of the grayscale are refreshed until the grayscale value is completely refreshed, thereby improving the visual refresh rate. Through optimized PWM coding, not only the visual refresh rate can be improved, but also the utilization rate of LED brightness can be improved.

　　CME-M5 8051 Functional Description

　　The 200MHz main frequency 8051 MCU is the main control of the entire system, responsible for communicating with the PC, implementing the TCP/IP protocol stack, receiving program content from the PC through Ethernet, and writing it to the SD card in the form of files for program updates. At the same time, the 8051 is also responsible for program special effects processing; In addition, the 8051 collects information from temperature sensors and humidity sensors and displays it on the LED screen; collects ambient light sensors to achieve automatic brightness adjustment; and switches programs through infrared remote control. CME-M5 has integrated the RTC real-time clock, which can easily display information such as year, month, day, hour, minute, second, week, etc. on the full-color LED screen without external expansion chips; it supports digital clock and analog clock display.

　　4 Conclusion

　　By adopting FPGA SoC chip, the design of asynchronous full-color LED display controller for the door lintel advertising market is realized. Since the resolution of door lintel advertising screen is generally not high, the 200MHz enhanced 8051 embedded in CME-M5 is fully capable of serving as the system master control. The solution supports 80K pixels, 16bit/65536-level grayscale, and the visual refresh rate supports up to 6000Hz. It supports static ~ 16-scan screen types, supports text, pictures, animations and simple video playback, supports digital clock and analog clock display, supports temperature and humidity display, automatic brightness adjustment, and infrared remote control program switching.