Design of single chip system circuit in intelligent plugging device marine communication

1 Intelligent plugger underwater acoustic communication system
    For intelligent pluggers used in submarine pipelines, it is important to realize their above-water and underwater communication systems to complete the remote control operation of the platform. The entire communication system is mainly composed of three logical subsystems: the offshore control center, the external communication link, and the remote control actuator. The system is mainly based on sound waves and ultra-low frequency electromagnetic waves for two-way communication. Due to the particularity of the marine environment, underwater acoustic wireless communication is adopted.
    The plugger communication system is divided into two parts: above-water receiving/transmitting and underwater receiving/transmitting communication systems. The above-water part is composed of a computer, a modem, a receiving/transmitting filter amplifier circuit, and a bidirectional transducer; the underwater part is composed of an underwater bidirectional transducer, a receiving/transmitting filter amplifier circuit, an underwater acoustic/ELF conversion circuit, and an ELF-Modem+ single-chip control system. Because the signals are transmitted in both receiving/transmitting directions, a bidirectional transducer is used. The bidirectional transducer can both send and receive sound wave signals, that is, the transducer has both a transmitter and a hydrophone inside. In the preliminary work, an underwater acoustic communication scheme as shown in Figure 1 was proposed. This article makes the following design on the single chip microcomputer control system circuit.

2 Design of the single-chip microcomputer system
    The single-chip microcomputer system is mainly composed of power supply, A/D conversion, PWM regulation circuit, main control circuit, serial communication, and switch and display circuits designed for debugging circuits.
2.1 Design of the main control circuit The
    main control circuit of the single-chip microcomputer system is shown in Figure 2. PC0-PC7 of the main chip ATmega169 is used as the display control port, PA0-PA7 is defined as Din 1 to Din 8 in the C language programming environment, that is, TTL level digital input, PD0-PD7 is the digital input channel, PF0-PF7 is the analog input channel, PB5 and PB6 are used as PWM control to control simple mechanical actions, PE0 and PE1 are used as communication ports, and PE2-PE5 are connected to the DIP switch for debugging programs. In addition, there are interrupt and buzzer settings. The 23rd and 24th pins of ATmega169 are connected to the crystal oscillator to provide clock for ATmega169.

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2.2 Design of communication circuit
    The communication of the single-chip microcomputer is carried out using the RS-232 interface, as shown in Figure 3. The TXD and RXD signal lines of the single-chip microcomputer are connected to the 9th and 10th pins of MAX232 respectively.

    Since the level of the microcontroller serial port is TTL level, it must be converted to RS-232 level before it can communicate with the modem. The MAX232 chip is used in the figure to realize the connection between the microcontroller and the modem and perform level conversion.
    Although the microcontroller has a serial I/O port, it does not have standard interface handshake signal lines such as RTS, CTS, DTR, and DSR. Considering that the communication volume between the microcontroller and the host computer is not large, a simple "three-wire" is used when connecting, that is, only through TXD, RXD and ground wire GND, and other signals are ignored when sending AT commands when initializing the modem. If you want to make the system more compact, you can also use a microcontroller connected to an 8250 communication interface chip to form a modem + microcontroller system. The
    combination of various circuits together constitutes a microcontroller system, and the final circuit board is shown in Figure 4.

3 Signal filtering and amplification circuit design
    The acoustic signal received by the underwater transducer has much interference and small amplitude. To obtain reliable carrier information, the received signal should be filtered and amplified first, and then transmitted to the underwater modem to demodulate the carrier information. The receiving circuit design here includes the bandpass filter circuit design and the signal amplification circuit design. A low-order bandpass filter circuit was used in the water test, and the integrated chip AD620 with a wide amplification gain range was selected for signal amplification.

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    Before the water test, the digital signal processing function in MATLAB software was used to create a simulated digital bandpass filter. According to the requirements of the subject, the performance indicators of the filter were determined, and a bandpass filter was designed using the window function in MATLAB. The signals of f1=100Hz and f4=250Hz were filtered out, while the signals of f2=150Hz and f3=200Hz were retained.

    From the comparison of Figure 5, it can be seen that the two components of the signal with frequencies of 150Hz and 200Hz are retained. This shows that the performance of this bandpass filter meets the index requirements.

4 Design of signal amplification circuit using AD620
    AD620 is a low-cost, high-precision instrument amplifier with an 8-pin SOIC plastic package. AD620 has the characteristics of small size, low power consumption, low noise and wide power supply range.
    Before the experiment, the amplitude of the received signal waveform was between 22 and 28mV. In order to meet the input signal requirements of the next demodulation circuit, the amplification gain G was selected as 200 according to the effect of the received signal in multiple experiments. According to the formula, the external control resistor RG can be calculated to be 248.2Ω. The signal voltage amplitude after amplification is between 4.5 and 5.5V, which meets the input signal requirements of the Modem.

5 Implementation of filter amplifier circuit
    The design of the hardware filter amplifier circuit in the water test experiment is shown in Figure 6. The bandpass filter circuit is composed of a basic high-pass filter and a low-pass filter cascade. The values ​​of each resistor component in the circuit are calculated according to the filter frequency range.

    The capacitors C1 and C2 in the circuit are 0.1μF, and fH and fL are 36kHz and 34kHz respectively. The parameter calculation formulas of the resistor components are: R1=1/2πfHC1, R2=1/2πfLC2R2. Substituting the values ​​of C1, C2, ffH, and fL into the above formulas, we can calculate R1=44.23Ω and R2=46.83Ω.
    Power supply decoupling in the circuit is an important detail that is often overlooked. Usually, a bypass capacitor (typical value is 0.01μF) is connected between the power pin and ground of each IC. Although it is usually suitable, it may be ineffective or produce worse transient voltage than without a bypass capacitor in actual applications. Therefore, consider adding a 0.01μF bypass capacitor between the power pin of the chip and the connection point of the reference terminal REF on the circuit board in the circuit.

6 Conclusion
    According to the hardware circuit designed in this article, the designed circuit was simulated and analyzed using Multisim software, and good results were achieved. Then, an actual circuit was made according to the diagram for signal filtering and amplification.