Design of Reset Circuit for 51 Single Chip Microcomputer

The MCU will execute the application program in order from address 0000H only after a reliable reset. At the same time, the reset circuit is also one of the sensitive parts that is easily interfered by external noise. Therefore, the reset circuit should have two main functions:

1. The system must be reset reliably;

2. Must have certain anti-interference capabilities;

1. RC selection of reset circuit

The reset circuit should have the functions of power-on reset and manual reset. Taking the MCS-51 microcontroller as an example, the high-level width of the reset pulse must be greater than 2 machine cycles. If the system uses a 6MHz crystal oscillator, one machine cycle is 2us, so the minimum width of the reset pulse should be 4us. In the actual application system, considering the factors such as the stabilization time of the power supply, parameter drift, crystal oscillator stabilization time and the reliability of the reset, there must be enough margin. Figure 1 is a circuit design that uses the RC charging principle to achieve power-on reset. Practice has proved that the RC circuit is charged at the moment of power-on, and a positive pulse appears on the RESET pin. As long as the RESET terminal maintains a high level for more than 10ms, the microcontroller can be effectively reset.

Figure 1

The voltage across capacitor C in Figure 1-a (i.e., the reset signal) is a function of time:

u(t)=VCC*[1-exp(-t/RC)]

The voltage across the resistor R in Figure 1-b (i.e., the reset signal) is also a function of time:

u(t)=VCC*exp(-t/RC)

VCC is the power supply voltage, and RC is the time constant of the RC circuit = 1K*22uF = 22ms. With this formula, we can more easily conduct a thorough analysis of the above circuit.

In Figure 1-a, the minimum input high level of the NOT gate UIH = 2.0v. When the charging time t = 0.6RC, the charging voltage u(t) = 0.45VCC = 0.45*5V, which is approximately equal to 2V, where t is the reset time. In Figure a, the time constant = 22ms, so t = 22ms*0.6 = 13ms.

2. Reliability and anti-interference analysis of reset circuit

The interference of the reset circuit port of the microcontroller mainly comes from the noise injected by the power supply and button transmission lines. Although these noises will not completely cause the system to reset, they may sometimes destroy the status of certain bits of the program status word in the CPU, causing adverse effects on control.

1. Circuit structure and anti-interference performance

Taking Figure 1 as an example, the schematic diagram of the power supply noise interference process is shown in Figure 2, which respectively plots the voltage disturbance waveforms at point A and point B.

As can be seen from Figure 2, Figure 2(a) is essentially a low-pass filter link, which has a good inhibitory effect on interference with a pulse width less than 3RC; Figure 2(b) is essentially a high-pass filter link, which has no inhibitory effect on pulse interference. It can be seen that for the two reset circuits shown in Figure 1, the ability of a to resist interference power supply noise is better than that of b.

2. Impact of reset button transmission line

The reset button is usually installed on the operation panel, with a long transmission line, which is easy to cause electromagnetic induction interference. The button transmission line should use a twisted pair (with the performance of suppressing electromagnetic induction interference) and stay away from AC power equipment. On the printed circuit board, a 0.01-0.1uF high-frequency capacitor is connected in parallel to the reset port of the microcontroller, or a mitt circuit is configured to improve the ability to suppress the series noise. [page]

Figure 2

3. Impact of power supply stabilization process on reset

The microcontroller system reset must be performed after the CPU obtains a stable power supply. The RC parameter design of a power-on reset circuit should take the stable transition time into consideration.

In order to overcome the influence of DC power supply stabilization process on power-on automatic reset, the following measures can be adopted:

(1) Install the power switch on the DC side, turn on the AC power supply, and then turn on the power switch K after the DC voltage stabilizes, as shown in Figure 3.

Figure 3

(2) Use a reset circuit with power supply detection, as shown in Figure 4. Reasonably configure the resistance values ​​of resistors R3 and R4 and select the breakdown voltage of the voltage regulator DW so that before VCC reaches the rated value, the transistor BG is cut off, the VA point level is low, and the capacitor C is not charged; when VCC is stable, DW breaks down, the transistor BG is saturated and turned on, causing the VA point to be high, charging the capacitor C, RESET is high, and the microcontroller starts the reset process. When the charging voltage on the capacitor C reaches 2V, RESET is low, and the reset ends.

Figure 4

4. Necessity of parallel discharge diode

In the reset circuit of Figure 1, the discharge diode D is indispensable. When the power is cut off, the capacitor discharges quickly through the diode D, and when the power is restored, reliable power-on automatic reset can be achieved. If there is no diode D, when the power is cut off instantly due to some interference, since C cannot quickly discharge the charge, when the power is restored, the microcontroller cannot be powered on and automatically reset, resulting in the program running out of control. The power supply momentary power failure interference will cause the program to stop running normally, causing the program to "fly around" or enter a "dead loop". If the power failure interference pulse is wide, RC can be discharged quickly, and after the power is restored, it will be automatically reset by powering on, so that the program enters the normal state; if the power failure interference pulse is narrow, RC cannot be fully discharged at the moment of power failure, and the system cannot be powered on and automatically reset after the power is restored.

3. Delayed reset of I/O interface chip

In a single-chip microcomputer system, the reset ports of some I/O interface chips are often connected to the reset port of the single-chip microcomputer, that is, unified reset. The reset time of the interface chip is slightly different due to different manufacturers; the reset line is long and the distributed capacitance is large, which causes the reset process of these interfaces to lag behind the single-chip microcomputer. Engineering practice shows that when the reset of the single-chip microcomputer is completed and these I/O chips are initialized immediately, it often leads to failure. Therefore, when the single-chip microcomputer enters the 0000H address, it first executes a software delay of 1-10ms, and then initializes these I/O chips.