Design of ultra-low power wireless data transmission system based on RF2.4 GHz

　　At present, wireless communication technology has become a hot topic, and miniaturization and low power consumption of system design have become an inevitable trend of development. Under the premise of ensuring the reliability of system operation, how to achieve low power consumption of the system is a major problem that needs to be solved in wireless data transmission systems. This paper designs a low-power wireless data transmission system using MSP430 ultra-low power microcontroller and 2.4 GHz ISM band RF chip EMl98810. The system is powered by dry batteries and can be widely used in battery-powered automatic data acquisition systems, wireless remote controls, wireless mice, wireless keyboards, wireless electronic tags, remote control toys, and wireless remote automatic meter reading for water, gas, heat, electricity and other residential meters.

　　1 System Overview

　　Currently, there are many integrated RF chips in the 2.4 GHz frequency band, and their performance varies. Table 1 lists the performance characteristics of several commonly used chips.

　　This system is designed with MSP430F247 microcontroller and EMC's EM198810 chip. The MSP430 series microcontroller is a 16-bit reduced instruction set (RISC) microprocessor. It has a rich addressing mode (7 source operand addressing, 4 destination operand addressing), 27 concise core instructions and a large number of analog instructions; a large number of registers and on-chip data memory can participate in a variety of operations; it has efficient table lookup processing instructions; it has a high processing speed, and the instruction cycle is 125 ns under 8 MHz crystal oscillator drive; there are many interrupt sources, and they can be nested arbitrarily; when the system is in a power-saving standby state, it only takes 6μs to wake up with an interrupt request. The power supply voltage of the MSP430 series microcontroller is 1.8~3.6 V. When it runs under 1 MHz clock conditions, the chip current is about 200~400μA, and the lowest is only 0.1 μA in the clock shutdown mode.

　　The EMl98810 chip has a built-in 2.4 GHz GFSK RF transceiver with 8-bit data frame wireless transceiver function. The leading area can be set to 1 to 8 bytes, supports 1 to 4 word addresses (up to 64 bits), and the maximum data transmission rate is 1 Mbps, allowing long data packets to be transmitted; the frequency range is 2 400 to 2 482 MHz (81 channels), the transmission distance is 100 m (PCB antenna), the RF output power is 2 dBm, the receiving sensitivity is above -85 dBm, and the SPI digital programming interface is used, and the interface voltage is 2.5 to 3.7 V. The chip's transmit power can be digitally programmed and adjusted, and low power consumption mode can be easily achieved through register settings; it has built-in multiple error correction and detection functions, and uses various payload data formats to eliminate DC drift; it supports FEC 1/3, 2/3 error correction and detection functions and CRC16 error detection functions. There are two working modes inside: FIFO and DIRECT. The FIFO mode is simple and easy to use, and has low requirements on the MCU. There is a 64-byte buffer for transmission and reception, and a maximum of 64 bytes of data can be processed at one time. The DIRECT mode has higher requirements on the MCU, and the MCU needs to handle various error correction and detection functions.

　　2 System Design

　　2.1 System Hardware Design

　　Figure 1 is a schematic diagram of the connection between the MSP430F247 microcontroller and the EM198810, which is connected to the RF chip via the SPI bus. The actual circuit connection is shown in Figure 2.

　　2.2 System software design

　　The data packet format is as follows:

　　Among them, the leading area can be configured as 1 to 8 bytes, the synchronization word can be configured as 16, 32, 48 or 64 bits; the leading and trailing areas can be configured as 4, 6, 8...18 bits; the data area can be in four formats: NRZ code, Manch-ester code, 8/10-bit code, and data with FEC.

　　After the system is powered on, first make the RESET_n pin of EM198810 low to ensure effective reset of the chip; then make this pin high, the BRCLK pin will generate a 12 MHz clock; then initialize the relevant registers. The initialization program flow is shown in Figure 3.

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　　Among them, Reg48 is the data frame format configuration register, which needs to set the length of the leading area (default is 3 bytes), the default length of the synchronization word is 64 bits, the default length of the leading tail is 4 bits, and the data is in NRZ format by default. If the second bit of this register is 1, it is configured in sleep mode, and if the third bit is 1, it is configured in standby mode. Reg49~51 is used to set the delay time for transmission and reception. Reg52~55 is used to set the synchronization control word, all of which are 0000H by default. Reg57 is used to configure whether to enable CRC check, packet length control mode, etc. The detailed configuration data of Reg48~57 are as follows:

　　Reg0~28 mainly configures the transmit power, VCO, RSSI, receive delay, channel selection and control, AMS test and control, BPF and AGC control, transmit and receive data control, DC drift control, PLL synchronization control, data transmission and reception timing control, N/VCO parameter control, clock, etc. The detailed configuration data of Reg0~28 are as follows:

　　After Reg0~28 are initialized, they are delayed for 2 ms, and data can be directly sent and received. It should be noted that frame registers Reg48~57 must be initialized before RFIC registers Reg0~28. All register reads, writes, and data sent and received are performed through the SPI interface, and only support slave mode. The SPI operation timing is shown in Figure 4. When the chip's 28th pin LDO_TUNE is grounded (R1 is disconnected, R2 is connected to a 0 Ω resistor), its data is valid on the rising edge of the SPI_CLK clock; when LDO_TUNE is connected to VDD (R2 is disconnected, R1 is connected to a 0 Ω resistor), the data is valid on the falling edge of the SPI_CLK clock. As long as SPI_SS is high, the data in the register remains unchanged; only when SPI_SS is low can the contents of the register be rewritten.

　　EMl98810 has two methods to detect the length of the data packet sent or received: one is to automatically detect it in the data frame, and the maximum frame length cannot exceed 255 bytes. First set the 13th bit of Reg57 to 1, then the first byte in the send or receive data area represents the length of the data, and the frame controller will automatically control the start and stop of sending and receiving. The other is to keep the state of sending or receiving unchanged, and control the correct sending and receiving of data packets by connecting an external MSP430F247.

　　The data transmission process is shown in Figure 5. When transmitting data, first set the 8th bit of Reg7 to 1, allowing the data transmission state to be entered under the control of the internal state machine, and then set the 0~6 bits of Reg7 to the selected channel. Before sending the leading and trailing area data, MSP430F247 must put the data into FIFO. If the data length exceeds 63 bytes, it should be written in multiple times. FIFO_flag=1 means that FIFO is empty. MSP430F247 uses this signal as an interrupt request to ensure the real-time writing of the transmitted data into FIF0. After the data transmission is completed, PKT_flag=1.

　　If Reg7[7]=1 and Reg7[0～6] are set to the same channel as the transmission, the chip enters the automatic receiving state, and the receiving data flow is shown in Figure 6. When the synchronization word is detected, the data packet is automatically received and decoded, and the standby mode is entered after the reception is completed. If the received data exceeds 63 bytes, FIFO_flag=1 is set, and MSP430F247 uses this signal as an interrupt request to ensure the real-time performance of the read data.

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　　When designing ultra-low power consumption, the MSP430F247 can set a timer interrupt. It is usually in LPM3 or LPM4 mode. When sending data, a timer interrupt is generated, and the EM198-810 is controlled to be in standby or sleep mode. The current of the MSP430F247 working in LPM3 mode is about 0.8μA, and the current in LPM4 mode is about 0.1μA. Under normal circumstances, the EM198810 transmits 26 mA, receives 25 mA, and stands by 1.9mA; it is 3.5μA in sleep mode. If the EM198810 is set to sleep mode and the MSP430F247 is set to LPM3 mode, the system power consumption is only 4.3μA, and it is completely feasible to use dry battery power supply.

　　MSP430F247 is connected to EMl98810 via SPI interface. The procedures to enter and exit LPM3 mode are as follows:

　　Set the second bit of Reg48 of EMl98810 to 1 and set SPI_SS to high level to enter sleep mode; if SPI_SS is set to low level, EMl98810 will automatically wake up and exit sleep mode.

　　Conclusion

　　After the actual circuit connection test, when the data transmitter continuously sends data at a rate of 500kbps, the current of the entire system is 28.2 mA, and the current of the data receiver is 26.1 mA; when the transmitter enters the sleep mode, the current is 5.2μA; when the receiver enters the standby state LPM3, the current of the entire system is 1.9 mA. According to the capacity of 2 dry batteries of 1300 mAh, 100 bytes of data are sent every 1 minute, and the single-chip mode switching time is considered, at a rate of 500 kbps:

　　The time required to send data is 5 ms, and the energy consumption for 1 hour is:

　　28. 2mA × 5ms × 60 times = 8460 (mA·ms)

　　Energy consumption in sleep mode for 1 hour:

　　5. 2μA×3600S×1000ms=18720(mA·ms)

　　The working time in the sending state is:

　　(1300mA×3600S×1000ms)／(18720+8460)=172185h

　　That is, it can work for 20 years when powered by 2 dry batteries. Similarly, it can be calculated that it can work for 683 hours (about 28 days) in the receiving state. Therefore, this design can be suitable for long-term low-power wireless data acquisition applications.

References:

[1]. MSP430 datasheet http://www.dzsc.com/datasheet/MSP430_490166.html.
[2]. EMC datasheet http://www.dzsc.com/datasheet/EMC_2342312.html.