The system clock is the heart and power source of the chip, so we start with the clock. The subsequent ADC and TIM are all based on the clock.
In STM32F746, there are 5 most important clock sources: HSI, HSE, LSI, LSE, and PLL.
LSI is a low-speed internal clock, RC oscillator, with a frequency of about 32kHz. It is used for independent watchdog and automatic wake-up unit.
LSE is a low-speed external clock, connected to a quartz crystal with a frequency of 32.768kHz. This is mainly the clock source of the RTC.
HSE is a high-speed external clock that can be connected to a quartz/ceramic resonator or an external clock source with a frequency range of 4MHz~26MHz.
HSI is a high-speed internal clock, RC oscillator, with a frequency of 16MHz. It can be used directly as a system clock or as a PLL input.
The NUCLEO-F746ZG development board uses a low-speed clock and a high-speed external clock source, where the low speed is 32.768kHz and the high-speed clock uses an external clock source.
Select HSE as the PLL clock source and PLL as the SYSCLK clock source, then the SYSCLK clock is 216MHz.
The system clock initialization code is as follows:
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Configure LSE Drive Capability
//配置 LSE 驱动能力
*/
HAL_PWR_EnableBkUpAccess();//上电复位后，备份域是受保护的，防止意外的写操作
//启用对 RTC 和备份寄存器的访问
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();//使能PWR时钟
//下面这个设置用来设置调压器输出电压级别，以便在器件未以最大频率工作,使性能与功耗实现平衡
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);//设置调压器输出电压级别1
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;//时钟源为HSE
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;//用户外部时钟输入
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;//打开PLL
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;//PLL时钟源选择HSE
RCC_OscInitStruct.PLL.PLLM = 4;//主PLL和音频PLL分频系数(PLL之前的分频),取值范围:2~63.
RCC_OscInitStruct.PLL.PLLN = 216;//主PLL倍频系数(PLL倍频),取值范围:64~432.
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//系统时钟的主PLL分频系数(PLL之后的分频),取值范围:2,4,6,8.(仅限这4个值!)
RCC_OscInitStruct.PLL.PLLQ = 2;//USB/SDIO/随机数产生器等的主PLL分频系数(PLL之后的分频),取值范围:2~15.
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)//初始化时钟
{
Error_Handler();
}
/** Activate the Over-Drive mode
*/
if (HAL_PWREx_EnableOverDrive() != HAL_OK)//开启Over-Driver功能
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;//选中PLL作为系统时钟源并且配置HCLK,SYSCLK,PCLK1和PCLK2
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;//设置系统时钟时钟源为PLL
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;//AHB分频系数为1
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;//APB1分频系数为4
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;//APB2分频系数为2
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)//同时设置FLASH延时周期为7WS，也就是8个CPU周期。
{
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;//配置扩展时钟，USART3
PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_SYSCLK;//USART3时钟选择为系统时钟
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)//初始化
{
Error_Handler();
}
/** Enables the Clock Security System
*/
HAL_RCC_EnableCSS();//使能CSS
}
The general steps of HAL library configuration STM32F746 clock system:
(1) Enable PWR clock
__HAL_RCC_PWR_CLK_ENABLE();//使能PWR时钟
The reason why the PWR clock needs to be enabled is that the "setting the regulator output voltage level" and "enabling the Over-Driver function" in the following steps are power control related configurations, so the PWR clock must be enabled.
(2) Set the output voltage level of the voltage regulator
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);//设置调压器输出电压级别1
This setting is used to set the regulator output voltage level to balance performance and power consumption when the device is not operating at maximum frequency.
The regulator output voltage level VOS is determined by bits 15:14 of PWR->CR:
If the system clock is 216M, you need to set the voltage level to 1 and enable the Over-Driver function.
(3) Initialize the RCC oscillator
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;//时钟源为HSE
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;//用户外部时钟输入
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;//打开PLL
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;//PLL时钟源选择HSE
RCC_OscInitStruct.PLL.PLLM = 4;//主PLL和音频PLL分频系数(PLL之前的分频),取值范围:2~63.
RCC_OscInitStruct.PLL.PLLN = 216;//主PLL倍频系数(PLL倍频),取值范围:64~432.
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//系统时钟的主PLL分频系数(PLL之后的分频),取值范围:2,4,6,8.(仅限这4个值!)
RCC_OscInitStruct.PLL.PLLQ = 2;//USB/SDIO/随机数产生器等的主PLL分频系数(PLL之后的分频),取值范围:2~15.
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)//初始化时钟
{
Error_Handler();
}
(4) Select to enable the Over-Driver function
if (HAL_PWREx_EnableOverDrive() != HAL_OK)//开启Over-Driver功能
{
Error_Handler();
}
(5) Initialize CPU, AHB and APB bus clocks
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;//选中PLL作为系统时钟源并且配置HCLK,SYSCLK,PCLK1和PCLK2
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;//设置系统时钟时钟源为PLL
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;//AHB分频系数为1
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;//APB1分频系数为4
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;//APB2分频系数为2
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)//同时设置FLASH延时周期为7WS，也就是8个CPU周期。
{
Error_Handler();
}
(6) Peripheral clock configuration-USART3
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;//配置扩展时钟，USART3
PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_SYSCLK;//USART3时钟选择为系统时钟
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)//初始化
{
Error_Handler();
}
(7) Enable CSS function
HAL_RCC_EnableCSS();//使能CSS
After the clock configuration is completed, you can check the clock frequency of each bus.
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