AX88180 is a high-performance, low-cost Non-PCI Gigabit Ethernet controller launched by ASIX of Taiwan. It complies with IEEE802.3/IEEE 802.3u/IEEE 802.3ab protocols and is suitable for a variety of embedded systems that require high-speed network access. It has a wide range of applications in streaming media, multimedia networks, high-bandwidth transmission, etc., such as audio and video content distribution, IP set-top boxes, digital recorders, DVD recorders, high-definition televisions, digital media adapters, home gateways, and IP televisions.
2 Internal structure
AX88180 has a built-in 10/100/1000 Mb/s Ethernet media access controller (MAC), and uses an RGMII interface with PHY: built-in host interface controller, which can be easily connected to a 16/32-bit host, and the addressing method is the same as SRAM; built-in 40 KB SRAM network packet buffer, of which 32 KB is used to receive data packets from PHY. 8KB is used for the host to send data packets to PHY, and packets can be stored, retrieved and modified in an efficient manner; built-in 256-byte configuration registers for host control and parameter settings; built-in EEP-ROM interface; built-in IP/TCP/UDP checksum offloads, which can greatly reduce the computing load of the microcontroller and improve transmission response time. Figure 1 is the internal structure block diagram of AX88180.
3 Main pin functions and distribution
AX88180 has 128 pins, which are mainly divided into RGMII interface, HOST interface, EEPROM interface, power interface, other interfaces, etc. Figure 2 shows the pin distribution of AX88180, and Table 1 and Table 2 are the pin function introductions of RGMII and HOST interfaces respectively.
4 System Principles
AX88180 has a 16/32-bit host interface that can be directly connected to an embedded microprocessor. The host can operate it like an SRAM. The host allocates a 64KB storage space to AX88180, of which 0000H-7FFFH is used for data reception. When receiving, AX88180 sends an interrupt to the host. The host reads the address and reads the received data into the system memory, which is then processed by the protocol handler; 8000H-FBFFH is used for sending data. When the system sends data, the host first sends the packaged data to this address, and then AX88180 sends the data to the network. RGMII is used to connect AX88180 and PHY. Gigabit supports full-duplex, and 10/100 Mb/s supports full-duplex and half-duplex modes. Figure 3 is a block diagram of the system composition. [page]
5 Application in high-speed data acquisition system
5.1 Hardware Design
Figure 4 shows an application circuit of an embedded Gigabit network interface in a high-speed data acquisition system. S3C2440A is a 16/32-bit RISC microprocessor, mainly for handheld devices and cost-effective, low-power applications. It is connected to AX88180 in bus mode, and its address bus, data bus, read and write signals are directly connected. The clock signal (40 MHz to 100 MHz) of AX88180 is provided by S3C2440A, and the interrupt signal of AX88180 is connected to EINT11 of S3C2440A: A simplified Gigabit Media Independent Interface RGMII interface is used between AX88180 and PHY device 88E1111, and the signals are directly connected.
5.2 Software Design
The program mainly consists of protocol program, driver, application program, etc. The protocol program can be obtained by porting the operating system (such as embedded Linux) of the host system; the driver mainly consists of initialization program, data receiving and sending program, interrupt service program, etc. Some drivers can be obtained from manufacturers, while others need to be written by users themselves. The following is the program code for writing PHY registers in the driver:
6 Conclusion
AX88180 is cheap and powerful, and there is no similar product. This article introduces its internal structure, function and principle. And gives a specific application design, which has a good reference significance for high-speed access to the network of embedded systems.
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