Sine signal generator based on EZ-USB microcontroller

　　1. Introduction

　　In recent years, with the development of communication systems, people have higher and higher requirements for signal sources. Direct Digital Frequency Synthesis (DDS or DDFS) has been further developed in this context. It has the advantages of relative bandwidth, high frequency resolution, short frequency conversion time, flexible control and full digitalization, and has low cost and low power consumption. Its superior performance has made it widely used in frequency hopping communications, radar systems, electronic measurement and other fields. The sinusoidal signal generator implemented with DDS chip AD9851 and EZ-USB microcontroller CY7C68013 can adjust the output signal by controlling AD9851 through the host computer, so that the output signal has the characteristics of high precision, high frequency and high stability. Second signal generator system hardware

　　Piece composition

　　1. Single chip microcomputer system.

　　This article uses the high-speed USB2.0 chip CY7C68013 from CYPRESS. This chip integrates an enhanced 8051 core and a single-chip microcomputer with a USB interface. It fully complies with the USB2.0 protocol and has a maximum transmission rate of 480Mbps. The chip has 8KB of RAM, which can fully meet the system's needs for data transmission each time, without the need for external RAM. Since there is no ROM inside the chip, once the USB device is disconnected from the PC, the program code will not be saved and needs to be downloaded again every time the USB device is connected to the PC. In addition, CY7C68013 supports an "E2PROM boot mode", which means first downloading the firmware to the off-chip E2PROM. Every time the USB device is powered on, FX2 automatically reads the program in the off-chip E2PROM into the chip.

　　Since the system mainly uses the special features of USB2.0 and single-chip microcomputer, the external circuit is easy to implement, as shown in Figure 1. 2 DDS hardware circuit design.

　　1) Principles and characteristics of DDS

　　DDS consists of a phase accumulator, a sine lookup table, a D/A converter, and a low-pass filter, as shown in Figure 2. The reference clock of DDS is a stable crystal oscillator, which is used to synchronize the functional modules of the entire synthesizer. The phase accumulator is similar to a simple counter. The phase accumulator converts the data of the frequency control word FSW into phase sampling to determine the size of the output frequency. The size of the phase increment varies with the external instruction FSW, and the value of the output frequency is determined by the given phase increment. When such data is addressed, the sine lookup table converts the sampled value stored in the phase accumulator into a digital function of the sine wave amplitude. The required signal waveform is obtained through the D/A converter and the low-pass filter. The output of DDS = fr·FSW/2N, and the frequency resolution of DDS is: Δf O =fr/2N.

　　2) Working principle and characteristics of AD9851

　　AD9851 is a direct digital frequency synthesizer produced by AD using advanced CMOS technology. Its maximum operating clock is 180MHz. In addition to a complete high-speed DDS, it also integrates a clock 6-frequency multiplier and a high-speed comparator. The integrated 6-frequency clock reduces the external reference clock frequency, and only a 30MHz crystal oscillator is required. Therefore, high-frequency radiation is reduced and the electromagnetic compatibility of the system is improved. The AD9851DDS system uses a 32-bit phase accumulator and a 10-bit DAC. At 70MHz analog output, the DAC output has a parasitic dynamic range of SFDR>43dB. 5-bit phase control can achieve a minimum phase change of 11.5°. Frequency control and phase adjustment can be input in parallel or serial mode.

　　3) Filter

　　Between the output of the AD9851D/A converter and its internal comparator input, an external low-pass filter is required to suppress harmonic interference. Considering that the elliptic function filter can achieve the best approximation of the ideal low-pass filter than the full-pole filter (such as Butterworth, Chebyshev filter, etc.), and the required order is the lowest under the same technical indicators, the circuit is easier to implement than other types of filters. Therefore, the elliptic function filter is used. Figure 3 is the schematic diagram of the elliptic low-pass filter designed using Ansoft Designer System. The indicators of this figure are: the maximum ripple is less than 12dB from 0-60MHz, and the minimum attenuation is 50dB at 75MHz.

　　3 Modulation signal generator

　　In the modulation signal generator module of this system, several external expansion modules are designed to make the system more complete and sound.

　　1）2ASK：

　　The MCU first calculates the control word of the 100KHz carrier and directly sends it to the DDS chip. Then, according to the bit rate requirement of 10Kbps, it outputs a control signal to the analog switch through the PB port every 100us to convert the sine wave signal into a 2ASK signal. [page]

　　2）2PSK：

　　The implementation principle is similar to 2ASK. The microcontroller calculates the two groups of control words required by AD9851, and then sends the two groups of control words to the DDS chip in sequence every 50us according to the bit rate requirement of 10Kbps.

　　3) Frequency Modulation:

　　According to the period of the modulation signal, the frequency control word update time is calculated, and then sent to the DDS in a loop to simulate the frequency change of the FM signal

　　 .

　　The two-stage signal 　　amplification circuit of AD811 is adopted. The first stage is the voltage amplification circuit. The gain of the circuit is adjusted by adjusting the resistance value. The second stage is the voltage follower, which further improves the load capacity of the circuit.

　　The development of this system is mainly based on the high-speed USB characteristics, coupled with a rich software development kit, which is conducive to the rapid development of a stable and efficient system, and has a good ability to quickly upgrade the system's functions and accuracy. The Cypress website provides a development kit for the CY7C68013 chip for download. The development kit provides some resources required for the development of firmware programs, such as Keil μVision2 integrated development environment (restricted version), Cypress C51 firmware framework program, and some example programs. There are two main ways to boot the firmware of CY7C68013. One is to store it on the EEPROM, and automatically add the firmware program to CY7C68013 through the self-test after power-on; the other way is to download the firmware program to CY7C68013 through the host.

　　This system is designed to use an external EEPROM chip to store USB device configuration information and 8051 application programs. The application program is loaded into the 8051 core after power-on and mainly completes two tasks: implementing the USB protocol, including USB device configuration and USB data transmission; initializing the AD9851 and generating and controlling signals.

　　1 Firmware Program Framework

　　The firmware program flow is shown in Figure 4, which mainly performs the following tasks, where steps ①~⑤ are mainly used to complete the initialization of the USB interface, and steps ⑥~⑩ can be regarded as the task execution stage, which completes USB transactions and user-specific tasks.

　　① Initialize all state variables;

　　② Initialize the USB endpoint register in CY7C68013; [page]

　　③ Determine whether to relocate the descriptor table to ensure that the storage address of the descriptor table is located in the on-chip RAM;

　　④ Enable USB interrupt and allow the selected interrupt;

　　⑤ Determine whether there is a "re-enumeration" command from the system. If so, re-enumerate;

　　⑥ Initialize the internal registers of the AD9851 module and the signal configuration in the default mode;

　　⑦ Determine whether the setup token packet is received. If so, call the corresponding function to respond to the USB device request command;

　　⑧ Determine whether to enter the sleep state, if so, put CY7C68013 into the sleep state;

　　⑨ Check whether there is a waveform modification command from the host computer, and execute tasks related to waveform modification according to the program;

　　⑩ Return to ⑦, loop to receive and execute various commands from the host computer.

　　2 AD9851 workflow The AD9851 workflow contains a total of 40 control codes (D39 to D0), which are:

　　(1) D39 and D38 are used to control the data input mode of AD9851. The data input mode of AD9851 is divided into parallel input mode and serial input mode. In parallel input mode, the mode control code is "00", and each 8-bit data input terminal D0~D7 inputs the frequency control word 5 times.

　　(2) D37 is used to adjust the output power of AD9851.

　　(3) D36~D32 phase modulation code is used to control the phase modulation amount of AD9851.

　　(4) D31~D0 are used to control the frequency output by AD9851. This 32-bit frequency control code is converted from the input frequency control word. The specific conversion relationship is:

　　(5) The input control word required by the DDS core in AD9851 is provided by the single-chip microcomputer. When performing frequency control, the phase modulation code, power adjustment code and input mode control code are first sent in, and then the 32-bit frequency control code is sent in. This system sets AD9851 to work in parallel data input mode. After the system is started, it accepts the function input by the user from the keyboard and calls the corresponding subroutine. According to the frequency value of the signal and the phase value under the 2psk function, the single-chip microcomputer converts the frequency value into the frequency phase control word according to the formula. The initial phase value is converted into a 5-bit binary phase modulation word according to the formula Phase (degrees)/11.25°, ready to be sent to the AD9851 frequency control output. Before transmitting data, the single-chip microcomputer first generates a RESET rising edge signal to AD9851, and delays 7ns to reset the entire lower computer system, and then transmits an 8-bit phase modulation code and the AD9851 working mode code and the 32-bit frequency control code in sequence. After each 8-bit control code is transmitted, the software needs to generate a valid WCLK rising edge signal to send the control code to the AD9851 input data register. After repeating five times, the 40-bit control code can be loaded into the data register inside the AD9851. Finally, a valid FQUD rising edge signal is generated to load the 40-bit control code into the DDS frequency synthesis unit in the AD9851. After 13 to 18 clock cycles, the required frequency output signal can be obtained.

　　3 Driver Design The EZ-USBFX2 development kit of Cypress provides complete CY7C68013 driver source code, control panel program and firmware framework, which can greatly speed up the user's development process.

　　Modification, and then use after DDK compilation, so that software developers can focus a lot of time on application and firmware development. The USB device driver used in this design is a driver with some modifications to the FX2 development kit, mainly modifying the DeviceIoControl routine, adding control data transmission functions, starting and stopping AD9851, etc.

　　This paper proposes a sine signal generator system based on EZ-USB and AD9851. By taking advantage of EZ-USB and inputting simple data into the host computer software, the signal source required for the experiment can be generated, which greatly improves the flexibility and configurability of the system. Through experimental measurement, the output frequency accuracy and stability of the test reached 10 -6. References:

[1]. CY7C68013 datasheet http://www.dzsc.com/datasheet/CY7C68013_.html.
[2]. AD9851 datasheet http://www.dzsc.com/datasheet/AD9851_251850.html.
[3]. EZ-USB datasheet http://www.dzsc.com/datasheet/EZ-USB_305660.html.
[4]. AD811 datasheet http://www.dzsc.com/datasheet/AD811_1055521.html.