MSP430f149 port functions and settings

The commonly used ports of MSP430f149 are P1, P2, P3, P4, P5, and P6, which can be used directly for input/output. There are no special input/output instructions in the MSP430 system, and input/output operations are implemented by transmitting instructions. Each bit of port P1~P6 can be used independently for input/output, that is, it has bit addressing function. Common keyboard interfaces can be directly simulated with ports and controlled by query or interrupt mode. Since the port of MSP430 only has a data port, no status port or control port, in actual applications, such as in query-type input/output transmission, one or several bits of the port can be used to transmit status information, and the status of the corresponding bit can be queried to determine whether the peripheral is in the "ready" state.

Function of the port:

(1) P1, P2 ports: I/O, interrupt function, other on-chip peripheral functions such as timers and comparators;

(2) P3, P4, P5, P6 ports: I/O, other on-chip peripheral functions such as SPI, UART mode, A/D conversion, etc.;

Each port of MSP430 has a rich set of control registers for users to implement corresponding operations. P1 and P2 have 7 registers, and P3~P6 have 4 registers. By setting the registers, we can achieve:

(1) Each I/O bit is independently programmable;

(2) Any combination of input, output and interrupt;

(3) All 8 bits of P1 and P2 can be used for external interrupt processing;

(4) All instructions can be used to operate on registers;

(5) Input and output can be performed byte by byte, or bit by bit.

The functions of ports P1 and P2 can be realized through their 7 control registers. Here, Px represents P1 or P2.

(1) PxDIR: Input/output direction register. The 8 bits are independent of each other and can define the input/output direction of the 8 pins respectively. The 8 bits are reset after PUC. When using the input/output function, the direction of the port should be defined first. When used as input, it can only be read. When used as output, it can be read and written. 0: input mode; 1: output mode.

For example: P1DIR|=BIT4; //P1.4 output, P2DIR=0XF0; //high 4 bits output, low 4 bits input.

(2) PXIN: Input register, which is a read-only register. Users cannot write to it, and can only know the input signal of the I/O port by reading the contents of its register. Therefore, the direction of its pin should be selected as input. For example, in the keyboard scanning program, it is often necessary to read the port register value of the row line or column line to judge the case situation.

For example: unsigned char key;

P1DIR&=~BIT4; //P1.4 input

……

key=P1IN&0X10; //output port P1.4 value

……

(3) PXOUT: Output register. This register is the output buffer register of the I/O port. When reading, the content of the output buffer is independent of the pin direction definition. Changing the content of the direction register will not affect the content of the output buffer.

For example: PIOUT|=0X01; //P1.0 outputs 1, PIOUT&=~0X01; //P1.0 outputs 0.

(4) PXIFG: Interrupt flag register. Its 8 flag bits indicate whether the corresponding pin has an interrupt request to be processed. 0: No interrupt request, 1: Interrupt request. The interrupt flags are PXIFG.0~PXIFG.7. It should be noted that PXIFG.0~PXIFG.7 share an interrupt vector and are multi-source interrupts. When an interrupt caused by any event is processed, PXIFG.0~PXIFG.7 will not be reset automatically. The software must determine which event it is and reset the corresponding flag. In addition, the time of the external interrupt event must be kept at least 1.5 times the MCLK time to ensure that the interrupt request is accepted and the corresponding interrupt flag is set.

(5) PXIES: Interrupt trigger edge selection register. If a pin of the PX port is allowed to interrupt, the interrupt trigger mode of the pin must also be defined. 0: rising edge trigger sets the corresponding flag, 1: falling edge trigger sets the corresponding flag. For example: MOV.B #07H, &P1IES; the falling edge of the lower 3 bits of p1 triggers an interrupt.

(6) PXIE: Interrupt enable register. Each pin of the PX port has a bit to control whether the pin is allowed to interrupt. 0: Disable interrupt, 1: Enable interrupt. MOV.B #0E0H, &P2IE; The upper 3 bits of P2 enable interrupts.

(7) PXSEL: Function selection register. The two ports P1 and P2 also have other on-chip peripheral functions. These functions are connected to the outside of the chip by multiplexing the P1 and P2 pins. PXSEL is used to select the I/O port function and the peripheral module function of the pin. 0: Select the pin as an I/O port, 1: Select the pin as a peripheral module function. For example: P1SEL|=0X10; //P1.4 is a peripheral module function.

Ports P3, P4, P5, and P6 do not have interrupt capabilities, and their other functions are the same as those of PI and P2. Excluding the three registers related to interrupts of ports P1 and P2, the four registers of ports P3, P4, P5, and P6 (with the same usage as P1 and P2) are PXDIR, PXIN, PXOUT, and PXSEL for users to use.