Design of Interface between TLC320AD50C and DSP

In many application systems, in order to apply the excellent digital signal processing capabilities of DSP, we must first digitize the analog signal (A/D conversion), then perform corresponding algorithm processing on the sampled data, and finally output it after analog conversion (D/A conversion). The key issue in these DSP application systems is how to easily and efficiently implement these conversions, which inevitably involves the design of interface circuits. This article introduces the design and implementation method of the interface between the analog interface circuit TLC320AD50C (hereinafter referred to as AD50) that integrates ADC channels and DAC channels in a single chip and the buffered serial port of TMS320VC5402. Then, based on the hardware design of this interface circuit, the acquisition and playback of voice signals are realized through software programming.

1 Chip Introduction

TMS320VC5402 is a 16-bit fixed-point general-purpose DSP chip belonging to the TMS320C54x series produced by TI. It is flexible, high-speed, cost-effective and low-power. Its main features include: using an improved Harvard structure, 1 program bus (PB), 3 data buses (CB, DB, EB) and 4 address buses (PAB, CAB, DAB, EAB), with a dedicated hardware logic CPU, on-chip memory, on-chip peripheral dedicated instruction set, dedicated assembly language tools, etc. TMS320VC5402 contains 4K bytes of on-chip ROM and 16K bytes of dual-access RAM, 1 HPI (HoST Port Interface) interface, 2 multi-channel buffered single-port MCBSP (Multi-Channel Buffered Serial Port), single-cycle instruction execution time of 10ns, dual power supply (1.8V and 3.3V), and JTAG boundary scan emulation logic that complies with the IEEE1149.1 standard.

AD50 is a 16-bit analog interface chip produced by TI with an audio range (sampling frequency of 2K~22.05KHZ), built-in anti-aliasing filter and reconstruction filter. It has a synchronous serial communication interface that can be connected to many DSP chips. The AD50C chip also includes a timer (to adjust the sampling rate and frame synchronization delay) and a controller (to adjust the programmed amplifier gain, phase-locked loop PLL, master-slave mode). AD50 has a 28-pin plastic SOP package (with DW suffix) and a 48-pin plastic flat package (with PT suffix). It is small in size and suitable for portable devices. The operating temperature range of AD50 is 0~70℃, powered by a single 5V power supply or a combined power supply of 5V and 3.3V, and the maximum power consumption during operation is 120 mW.

2 Hardware Design

2.1 Schematic diagram of the internal structure of AD50

The first channel at the top of Figure 1 is the analog signal input monitoring channel, the second channel is the analog signal conversion to digital signal (A/D) channel, the third channel is the digital signal conversion to analog signal (D/A) channel, and the bottom channel is the AD50 operating frequency and sampling frequency control channel. The input clock (MCLK) described in this article is 8.192MHz, and the sampling frequency of A/D and D/A is MCLK/(128*N) Hz (N is set by bits 4 to 6 of the fourth register of AD50C).

2.2 Pin connection between AD50 and DSP

AD50 and TMS320VC5402 are connected in SPI mode. AD50 works in master mode (M/S=1), providing SCLK (data shift clock) and FS (frame synchronization pulse). TMS320VC5402 works in slave mode of SPI mode, BCLKX1 and BFSX1 are input pins, and both receive and send data using external clock and shift pulse. [page]

3 Software Design

3.1 Software Development Process

Once the correct hardware connection is completed, the next step is to proceed with software programming and debugging. The tasks to be completed include:

(1) Initialization of the TMS320VC5402 serial port. First, reset the DSP serial port 1, and then program the 16 registers of serial port 1 to make the DSP serial port work in the following state: run in SPI mode, one segment per frame, one word per segment, 16 bits per word, the sampling rate generator is generated by the DSP internally, the frame synchronization pulse is valid at low level, and the frame synchronization signal and shift clock signal are generated externally. The DSP uses the query method to program the AD50C, and uses the DMA method to receive the D signal of the A/D conversion and send the D signal of the D/A conversion.

(2) AD50 initialization. The initialization operation process includes sending two strings of 16-bit digital information to AD50 through the synchronous serial port of TMS320VC5402. The first string is 0000 0000 0000 0001B. The least significant bit (bits0) indicates that the next data word to be transmitted belongs to the secondary communication (for the content of primary communication and secondary communication, please refer to reference [3]). The second data value is used to configure one of the four data registers of AD50. Bits15 to 11 are 0, Bits10 to 8 are the address value of the selected register, and Bits7 to 0 are the programming value of the selected register. The description of the four user-programmable registers is as follows: R1 contains the analog input channel selection and hardware/software programming mode selection; R2 is used to select single/slave operation and telephone mode (for the content of telephone mode, please refer to reference [3]); R3 controls the number of slaves to be selected; R4 is used to set the analog signal programmable amplifier gain and A/D and D/A conversion frequency. The other two registers R5 and R6 are reserved by the manufacturer for testing and cannot be programmed by the user. In the following example, we program the four programmable registers to make the AD50C work in the following state: select INP/INM as the working analog input, 15+1-bit ADC and 15+1-bit DAC mode, without slave, sampling frequency of 10.67KHz, analog signal input and output amplifier gain are both 0dB.

(3) Writing user code. Complete the compilation of audio signal acquisition and playback code. This design uses the query method to program AD50, and uses the DMA method to receive the D signal of A/D conversion and send the D signal of D/A conversion.

3.2 Software Implementation

(1) Program flow chart:

(2) Some key codes:
Ⅰ, TMS320VC5402 interrupt and serial port initialization
...
stm #0002h, 48h
stm #0040h, 49h ; Set DSP serial port 1 to work in one word per frame, 16-bit mode per word
...
stm #0006h, 48h
stm #0100h, 49h ; Set CLKGDV=0 to make serial port 1 work at the maximum frequency
stm #0007h, 48h
stm #0a000h, 49h ; Set CLKSM=1, the sampling rate generator clock is generated by the DSP inside
stm #000eh, 48h
stm #0008h, 49h ; Set FSXP=1 to make the frame synchronization pulse low level effective
stm #0080h, imr ; DMA channel interrupt enable
rsbx intm ; Open all maskable interrupts
... [page]
Ⅱ, AD50 initialization
ld #0001h, a ; D0=1, request the second communication stlm a, 43h ; write data aa
to TLC320AD50C : stm #0001h, 48h ldm 49h, a and #0002h, a bc aa, aeq ; whether the data is received by TLC320AD50C ld #0180h, a ; program register 1 of TLC320AD50C to reset it stlm a, 43h bb: stm #0001h, 48h ldm 49h, a and #0002h, a bc bb, aeq ; whether the programming data is received by TLC320AD50C ... stm #0100h, a ; TLC320AD50C is out of reset and sets register 1 to make INP, INM input ... stm #0200h, a ; Set TLC320AD50C register 2 to invalidate telephone mode ... stm #0460h, a ; Set TLC320AD50C register 4 to set the sampling frequency to 10.667KHz ... stm #0300h, a ; Set TLC320AD50C register 3 to have 0 slaves ... III, DMA1 channel initialization stm #05h, 55h ; Select DMA1 channel stm #0041h, 56h ; Set the receiving end of serial port 1 to the source address of DMA event stm #027fh, 56h ; Set the destination address of DMA event stm #3000h, 56h ; Set the number of directly transmitted data stm #5000h, 56h ; Set the synchronous mode of serial port 1, one frame receives one word stm #404dh, 56h ; Set DMA to multi-frame mode, the source address is not adjusted and the destination address is adjusted according to the value of 57h stm #20h, 55h stm #0001h, 57h; Set the destination address to automatically increase by 1 and adjust stm #0282h, 54h; Set channel 1 to high priority and enable channel 1 ...

4 Experimental Results

Figures 4 and 6 below show the data acquisition system composed of TLC320AD50C and TMS320VC5402 for the voice signals "Hello" and "Ah" of the same experimental subject. Figures 5 and 7 show the graphical results of the voice signals "Hello" and "Ah" recorded by the recorder in the WINDOWS 98 attachment after being simulated using MATLAB.

Figure 8 below is the FFT Magnitude of the “Ah” sound sampled by AD50, and Figure 9 is the FFT Magnitude of the “Ah” sound recorded by the recorder in the WINDOWS 98 accessory.

5 Conclusion

This article takes TMS320VC5402 and TLC320AD50C as examples to introduce in detail the hardware interface and software implementation of AD50 and DSP serial port communication. From the experimental results, we can find that TLC320AD50C can sample the voice signal without distortion, which can fully meet the requirements of subsequent voice signal processing. It has a simple DSP interface, high performance, and low power consumption, and has become the mainstream product for current voice processing. It is widely used in audio processing, voice enhancement, voice security, echo cancellation, VoIP and other telephone or voice applications.