A method to realize parallel communication between single chip microcomputer and PC

1 Introduction

In the development process of many single-chip control systems, in order to achieve the best control state and the highest technical performance of the control system, it is essential to repeatedly and carefully adjust the control parameters online. In the past, the human-computer dialogue between the single-chip microcomputer and the outside world was realized through the programmable keyboard display interface device 8279, but the addition of 8279 occupied a large amount of program space, some of which were nearly one-third of the entire program. In addition, it was not convenient to use the small keyboard to make small corrections to the control parameters.

Furthermore, product developers are very interested in the calculation process inside the control system. If the calculation results of each step can be transmitted for analysis and inspection, it will definitely benefit product development. Although serial communication between the microcontroller and the PC can also realize data exchange between the microcontroller and the PC, the speed is relatively low (up to 19200byte/s), which cannot meet the requirements of real-time transmission of large amounts of data. For this reason, a method of using the dual-port RAM IDT7132 and the parallel printer interface of the PC to realize parallel communication between the microcontroller and the PC was developed. This method can be used by simply connecting to the PC printer interface through the interface circuit, and the communication speed can also meet the requirements.

Figure 1 IDT7132 structure and function block diagram

2 Structure and Features of Dual-Port RAM IDT7132

IDT's dual-port RAM timing is compatible with INTEL's single-chip microcomputer system and is compatible with the popular MCS-98/96 series single-chip microcomputers. It is particularly suitable for high-speed two-way transmission of large amounts of data between single-chip microcomputers and single-chip microcomputers, and between single-chip microcomputers and PCs.

IDT7132 is a high-speed 2K×8 CMOS dual-port static RAM. It provides two independent ports with their own control, address and I/O pins, which can independently read and write any unit in the memory. IDT7132 also has an on-chip hardware port bus arbitration circuit, which provides a BUSY bus arbitration mode, allowing two machines to synchronously read or write any unit in the memory while ensuring data integrity. See Figure 1 for the IDT7132 structure and function block diagram, and the non-competitive read and write control is shown in Table 1.

Table 1 IDT7132 non-competitive read and write control words

Figure 3 Hardware interface circuit

3 The functions of the signals of the PC parallel printer interface

PCs are equipped with a standard CENTRONICS parallel printer adapter interface, which has long been used as a printer interface. Through analysis, it is found that it can also be used as a general I/O parallel port. By controlling the three I/O ports in the adapter, the input and output of data and control signals can be realized [1]. The following describes the functions of each I/O port and each pin of the parallel port.

The PC parallel printer adapter interface has 8-bit data input and output lines, which can read and write data on the external leads through the read and write 378H I/O port. A write operation to this port means that an 8-bit data is written to an 8-bit register latched and output to the external leads. A read operation to this port only reads the value latched in the output register by the write operation, so the read operation can only be used for the self-test of the printer interface. For dual-machine communication, the 8-bit data line can only play the role of sending data from the PC to the outside.

The PC parallel printer adapter interface has five control signal output lines. The control signal can be output to the external lead by writing to the 37AH I/O port. The output signal is also latched by the register. The control word format is shown in Table 2.

Table 2 37AH I/O port control word format

D4 bit IRQEN is the interrupt enable control. If the interrupt mode is not used, D4 should be set to 0. In addition, please note that the signal logic output by the external lead INIT is the same as D2, while the other 3 bits are opposite. [page]

The PC parallel printer adapter interface has five status input lines. The status signals on the external leads can be read into the PC by reading the 379H I/O port. The correspondence between the port input buffer and the status input lines is shown in Table 3.

Table 3 379H I/O port status signal format

4 Hardware interface circuit design

The principle block diagram of the parallel communication is shown in FIG2 , which is composed of a PC, a parallel communication interface, and a single-chip control system including a dual-port RAM.

Figure 2 Parallel communication principle block diagram

The parallel communication between the single-chip control system and the PC is realized by reading and writing the dual-port RAM. The single-chip access to the dual-port RAM is no different from the off-chip expansion RAM, while the PC side needs to design an interface circuit to read and write the dual-port RAM. From the above analysis, it can be seen that the PC parallel printer adapter interface has 13 output lines and 5 input lines for accessing the dual-port RAM, and the address bus width of the dual-port RAM IDT7132 is 11 bits and the data bus width is 8 bits. Therefore, the latch 74LS373 must be used to share the address and data buses, and the dual-way switch 74LS157 must be used to read the 8-bit data of IDT7132 into the PC twice. The hardware interface circuit is shown in Figure 3.

The control word, address, and output data of the port RAM are all sent by the PC writing to the 378H port. The latch commands of the three 74LS373s and the control commands of the 74LS157 are implemented by writing to the 37A port. Also note: When the PC reads data from the dual-port RAM, H3 should be controlled to a high level so that the H3 output is in a high-impedance state to avoid affecting the read data. When the PC writes data to the dual-port RAM, H3 should be at a low level.

To meet the real-time requirements, the chip select signal on the right side of the dual-port RAM can be connected to (as shown by the dotted line in the figure), and the PC print interrupt IRQ7 is used to perform parallel communication in interrupt mode. The microcontroller control system is the active party. The microcontroller writes various data into the dual-port RAM at the end of each control cycle, and then issues an interrupt request.

5 Software Design

Below are two functions written in Turbo C2.0 for read and write operations in a non-interrupt manner.
Void readdata(unsigned char read_address_L, unsigned char read_address_H,
unsigned char read_data)
{
outportb(0x378,0x70); /*Write dual-port RAM control word and make H3 high level*/
outportb(0x37a,0xf);
outportb(0x37a,0xb);
outportb(0x378,read_address_L);
outportb(0x37a,0xa);
outportb(0x37a,0xb);/*Send low 8 bits of address to H2 latch*/
outportb(0x378,read_address_H);
outportb(0x37a,0xf);
outportb(0x37a,0xb); /*Send high 3 bits of address to H1 latch*/
outportb(0x378,0x60); /*Send read command*/
outportb(0x37a,0xf);
outportb(0x37a,0xb);
read_data=inportb(0x379)&0xf; /*Read low 4 bits of data*/
outportb(0x37a,0x9);
read_data+=(inportb(0x379)&0xf)<<4; /*Read high 4 bits and merge with low 4 bits*/
}

Void writedata(unsigned char write_address_L, unsigned char write_address_H,
unsigned char write_data)
{
outportb(0x378,0x20); /*Write dual-port RAM control word and make H3 low*/
outportb(0x37a,0xf);
outportb(0x37a,0xb);
outportb(0x378,write_address_L);
outportb(0x37a,0xa);
outportb(0x37a,0xb); /*low 8 bits of address are sent to H2 latch*/
outportb(0x378,write_address_H);
outportb(0x37a,0xf);
outportb(0x37a,0xb); /*high 3 bits of address are sent to H1 latch*/
outportb(0x378,write_data);
outportb(0x37a,0x3);
outportb(0x37a,0xb); /*output data is sent to H3 latch*/
outportb(0x378,0x0); /*write command*/
outportb(0x37a,0xf);
outportb(0x37a,0xb);
}

6 Conclusion

The parallel communication between the single-chip microcomputer and the PC is realized by using the dual-port RAM and the parallel printer interface of the PC. It has the advantages of simple interface circuit, no need to make any changes to the PC side, easy to implement and fast communication speed. The communication rate of the PC with 486DX4/100 CPU can reach 30kbyte/s, which greatly exceeds the serial communication. This solution has been successfully applied to the development of the digital electronic speed governor of the locomotive diesel engine with MCS196KC as the control core. The retained historical data has laid the foundation for further improving the performance of the speed governor, especially the control algorithm. In addition, this solution is combined with a laptop computer and is expected to be expanded into a portable debugging and monitoring tool in the future digital electronic speed governor products.

References
[1] Lü Jingyu. Microcomputer interface technology [M]. Beijing: Science Press, 1995.
[2] Qian Zhanjun. Data acquisition using notebook computer printer port [J]. Application of Electronic Technology, 1995 (6).
[3] Zhang Li. Principle and application development of PC printer port [M]. Beijing: Tsinghua University Press, 1996.