Design of voice/text message wireless transmitter

1. System composition

The system block diagram of the voice/text SMS wireless transmitter is shown in Figure 1. It consists of integrated circuits MC1648, MC145152, MC12022, a phase-locked loop frequency synthesizer composed of a low-pass filter and a crystal oscillator, an audio processor, a data encoder, an AT89S52 microcontroller, buttons, a 128×64 dot matrix LCD, and other components.

Figure 1 System block diagram of voice/text message wireless transmitter

2. Circuit Design

(1) Voltage-controlled oscillator circuit (VCO)

The VCO is mainly composed of the voltage controlled oscillator chip MC1648, the varactor diode V149 and the LC parallel resonant circuit. The power supply uses a +5V voltage.

MC1648 needs to be connected to a parallel resonant circuit consisting of an inductor and a capacitor. The capacitor uses a pair of series varactor diodes, which are connected back to back to the inductor. The voltage value applied to the varactor diode is adjusted to stabilize the output frequency of the VCO at 35MHz. At the operating frequency, in order to achieve the best working performance, the QL of the LC parallel resonant circuit is required to be ≥100. The VCO circuit diagram is shown in Figure 2.

Figure 2 Voltage Controlled Oscillator (VCO) Circuit Diagram

The oscillation frequency range generated by the VCO is related to the voltage-capacitance characteristics of the varactor diode. The size of the CVD of the varactor diode is controlled by the applied bias voltage U. For fc=35MHz, CVD=20pF, using the formula , we can calculate L=1.04μH.

Pin 3 of MC1648 is buffer output, one for pre-divider MC12022 and one for output after power amplification. Pin 5 of the chip is the feedback terminal of the automatic gain control circuit (AGC). Since the frequency of this design is fixed at 35MHz and its feedback amplitude is not large, pin 5 is grounded through a capacitor.

(2) Phase-locked loop circuit

The output frequency of the VCO is often not stable enough due to the influence of its own parameters, the stability of the control voltage, temperature, external electromagnetic interference and other factors. Therefore, an automatic phase control link, namely a phase-locked loop, can be added to stabilize the transmission frequency. The transmission frequency is fed back and compared with the standard signal generated by the crystal oscillator. Under the tracking of the phase-locked loop, the transmission frequency always approaches the standard signal and is eventually locked at the standard frequency, achieving the same stability as the reference crystal oscillator.

The phase-locked loop circuit uses the MC145152 chip, which integrates a phase detector, a programmable frequency divider, and a reference frequency divider. The frequency division coefficient of the frequency divider can be controlled by parallel input data.

① Reference frequency division

The reference crystal oscillator is connected to the OSCin and OSCout pins of MC145152. The ÷R reference divider inside the chip provides 8 different frequency division coefficients to divide the reference signal. The R value is set by its pins RA0, RA1 and RA2. The setting range of RA0RA1RA2 is 000~111, and the corresponding frequency division coefficient is 8~2048. In this design, the reference crystal oscillator is 10.24MHz, so when RA0RA1RA2=101, that is, R=1024, the reference crystal oscillator frequency is divided by 1024.

②Programmable frequency division

In order to make the frequency division coefficient continuously adjustable, the programmable frequency division circuit uses a swallow pulse counter, which is composed of the ECL high-speed frequency divider MC12022 and the ÷A subtraction counter and ÷N subtraction counter inside the MC145152, as shown in Figure 3.

MC12022 has two frequency division coefficients: 64 and 65. M is its control terminal (output from MC145152 pin 9, input to MC12022 pin 6). When M is high, MC12022 uses P+1=65 as the frequency division coefficient, and when M is low, it uses P=64 as the frequency division coefficient. ÷N and ÷A are presettable subtraction counters, and the 6-bit A value and 10-bit N value are preset by the parallel input port respectively. PD is a digital phase detector. fo is the VCO output frequency (i.e., the transmitting frequency).

By using the swallow pulse counting method, any frequency division ratio can be obtained by properly selecting the N value and the A value. To achieve phase lock, fo/(PN+A)=fr must be satisfied. Conversely, since fo=fr×(PN+A), changing the values ​​of N and A can also change fo, thus achieving digital control of the output frequency.

÷A counter is 8 bits, so the maximum value of A is 63, and the P value of MC12022 is 64. If the reference frequency fr＝10kHz, the output frequency

fo＝（PN＋A）fr＝（64N＋A）×10kHz

In this design, to make the transmission frequency 35MHz, first set A = 0, then

N＝(fo/ fr－A)/P=（35×106/10×103）/64=54.69

Take N = 54 = 110110B, and then we have

A＝(fo/ fr)－PN=（35×106/10×103）－64×54＝44＝101100B

It can be concluded that the frequency can be controlled by using the microcontroller to preset corresponding values ​​for the N9~N0 and A5~A0 ports of MC145152.

Figure 3 Schematic diagram of swallowing pulse counter

③ Phase detection

The phase detector used in this design is integrated in MC145152, which is a new type of digital frequency/phase detection integrated circuit with frequency and phase detection functions. It can achieve broadband capture and hold without the need for auxiliary capture circuits.

(3) Power amplifier circuit

The final power amplifier uses transistor 2SC1970, which works in Class C amplification state and uses inductive load, and the output power reaches 20mW. When the input signal υt of the amplifier is a sine wave, the output current ic of the collector is a cosine pulse wave. The output fundamental voltage υc1 and current ic1 are obtained by using the frequency selection effect of the resonant circuit LC.

(4) Antenna impedance conversion circuit

According to MATLA simulation, for a 1m long telescopic antenna, when f=35MHz, its equivalent impedance is Z=R+jX=5.44-j115.1, which is capacitive. To match the transmitter's output impedance of 50Ω with the antenna, a resistance-reducing matching network must be added to the transmitter's output circuit, and series resonance must be used to offset the impact of the antenna's capacitive load, so that the power radiated by the antenna reaches the maximum.

The impedance transformation circuit of this design is shown in Figure 4. This circuit uses two LC networks to gradually transform the impedance from 50Ω→16Ω→5.4Ω. L3 is connected in series to offset the effect of the antenna being a capacitive load. When fo=35MHz, it is calculated that: C1≈160.8pF, L1≈76nH, C2≈281.2pF, L2≈13.4nH, L3=523.49nH.

Figure 4 Impedance transformation circuit

(5) Coding circuit

The encoding circuit uses the encoding chip PT2262 with address and data encoding functions. The encoding signal output by PT2262 consists of an address code, a data code, and a synchronization code to form a complete codeword. The address encoding input of the PT2262 transmitter chip has three states: "1", "0" and "open circuit", and the data input has two states: "1" and "0". The different states added to each pin end are used to determine the encoding of the corresponding address and data, and output from the output terminal Dout. The 6 data bits (D0~D5) are preset by the microcontroller pin end (P20~P25), and the 6 address codes are also preset by the microcontroller pin end (P00~P05). The signal output by Dout is added to the varactor diode in the VCO circuit through the left channel for modulation and then emitted. The Dout output frequency can be changed by changing the resistance value connected between pin ends 15 (OSC1) and 16 (OSC2).

(6) Transmitter control, display and keyboard circuit

The transmitter controller uses the AT89S52 single-chip microcomputer, and uses the PT2262 encoder chip and the AT89S52 single-chip microcomputer to realize text message data transmission services and the selection and control of machine numbers. Text message data can be input by keys or keyboards, and the input audio input and text message input can be automatically converted; the display uses a 128×64 dot matrix LCD display.

3. Transmitter programming

The transmitter program can be mainly divided into several parts, including key processing module, LCD display module, data processing module and character conversion module. The program flow chart is shown in Figure 6.

Figure 6 Transmitter main program flow chart

4. System anti-interference measures

In this transmitter system, there are low-frequency signals, intermediate-frequency and high-frequency signals; there are analog signals, low-frequency baseband digital (pulse) signals and digital (pulse) signals of various frequencies generated by phase-locked loops. The cross-modulation of various signals will form internal interference signals with a wide spectrum, plus interference from various external interference signals. These interference signals not only affect the transmission quality of audio signals, but more importantly, they will also affect the call quality of the master and slave stations and the transmission quality of text messages, causing errors in calls and text messages. The anti-interference measures adopted by the system are:

① Shield the audio input stage before the transmitter modulator to prevent interference from 50Hz AC signals and digital (pulse) signals.

② Power supply isolation. The analog part and the digital part are powered separately. If they share a DC regulated power supply, decoupling circuits such as inductors and capacitors must be used.

③ Ground isolation. Since there are both digital circuits and high-frequency circuits in the circuit, the high-frequency ground and digital ground need to be separated when drawing the PCB board, and the high-frequency circuit needs to be isolated with metal shielding to reduce interference such as cross-modulation. The ground wire of the PCB board should be designed to be as thick as possible, and even a large area should be grounded. Except for the component leads, power supply lines, and signal lines, the rest are used as ground wires. At the same time, the analog ground should be separated from the digital ground.

④ Analog-to-digital isolation. The analog part will be affected by the pulse interference of the digital part. When drawing the PCB board, the wiring of the digital part and the analog part must be separated by a certain distance.

⑤ Digital isolation. This system uses a phase-locked loop, which will generate pulse signals of various frequencies. Call signals and text messages are also digital signals. These two types of digital signals must be isolated from each other. If the former interferes with the latter, it will cause errors in call or text message transmission, and the latter will interfere with the former, causing frequency division errors, thus affecting the stability of the phase lock.

⑥ Wherever an electrolytic capacitor is used as a decoupling capacitor, be sure to connect a smaller ceramic capacitor in parallel, and be careful not to reverse the polarity of the electrolytic capacitor, otherwise it will generate a lot of noise interference.

5. Conclusion

The designed transmitter has a transmission frequency of 35MHz, a peak power of 20mW, a frequency stability and accuracy of 10-5, can transmit voice signals, voice signal input can be microphone and line input, can transmit text messages, audio input and text message input can be automatically converted, text message input can be input by key or keyboard, LCD display, easy to operate. Matching with voice/text message wireless receiver, it has good application effect in smart home system.

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