Circular Gray Code VHDL Source Program

We know that the characteristic of Gray code counting is that adjacent code words have only one bit different, so when designing Gray code counting, we just need to find this bit and invert it. The idea of ​​finding this bit: First convert the Gray code into binary code. The Gray code position corresponding to the first ''0'' bit from LSB to MSB in this binary code is the required position. If all ''1'' bits are ''1'', the MSB position is the required position.

Below is a VHDL program taking cyclic Gray code as an example.

Library Ieee;

Use Ieee.Std_logic_1164.All;

Entity Demo Is Port(

Clock :In Std_logic;

Q: Out Std_logic_vector(3 Downto 0)); --The length of the vector depends on the user, this is just an example.

End Demo;

Architecture MyFavor Of Demo Is

Function NxG(Argv: Std_logic_vector) Return Std_logic_vector Is --This function completes the Gray code input and returns the Gray code of the next number.

Alias GV :Std_logic_vector(1 To Argv''Length) Is Argv;

Variable BV,GC :Std_logic_vector(1 To Argv''Length);

Begin

BV(1) := GV(1);

For I In 2 To Argv''Length Loop

BV(I) := GV(I) Xor BV(I - 1);

End Loop;

GC := GV;

For I In Argv''Length Downto 1 Loop

If BV(I) = ''0'' Or I = 1 Then

GC(I) := Not GC(I);

Exit;

End If;

End Loop;

Return GC;

End NxG;

Signal GC :Std_logic_vector(3 Downto 0);

Begin

Process(Clock) Begin

If Rising_edge(Clock) Then

GC <= NxG(GC);

End If;

End Process;

Q <= GC;

End MyFavor;