Using MAX543 to realize automatic range conversion of DSP sampling system

The specific method of realizing automatic range conversion of 12-bit serial D/A MAX543 in the sampling system of TMS320F206 DSP is given , and the R-2R resistor network structure in MAX543 is analyzed. The design of DSP application program is discussed, and the program flow chart is given. Keywords: serial D/A, R┐2R resistor network, DSP, range conversion In the weak signal detection circuit, the measured signal often changes due to factors such as sensor movement and test signal type change. At this time, it is necessary to adjust the gain of the signal. In order to make the adjustment meet the requirements of precise measurement, for some sampling systems with DSP as signal processor, accurate and real-time automatic range conversion circuit should be introduced. The automatic range conversion circuit can be composed of operational amplifiers and analog switches, but for this precise and real-time fine-tuning circuit, we use an automatic gain conversion circuit composed of MAXIM's 12-bit D/A converter MAX543. The flexible control function of the asynchronous serial port of DSPTMS320F206 is used to determine the appropriate signal amplification factor. This article first introduces the principles and characteristics of MAX534 and TMS320F206, then discusses the specific implementation method of the automatic range conversion circuit and gives a specific assembly program block diagram. 1 12-bit serial digital-to-analog converter MAX543 1.1 MAX543 principle and characteristics MAX543 is a 12-bit current output, multiplication digital-to-analog converter. It consists of a 12-bit R-2R type DAC, a serial input and parallel output shift register, a DAC register and a control logic circuit. At the rising edge of the clock signal (CLK), the serial data at the serial data input terminal (SRI) is shifted into the MAX543. When all the data enters, the LOAD terminal becomes a low level. MAX543 can be powered by a single 5V voltage, and the digital input is a TTL or 5VCOMS compatible level. The manufacturing process used by MAX543 can ensure a linearity of ±1/4LSB and a gain accuracy better than ±1LSB. Anti-static measures are used for the digital input. 1.2 Analysis of the internal circuit and working process of MAX543 The digital-to-analog conversion circuit of MAX543 consists of an R-2R resistor network and an NMOS mode select switch, as shown in Figure 2. The change of input data determines whether each mode select switch is connected to the ground or the Iout terminal. Figure 3 is the working timing diagram of MAX543. Starting from the rising edge of the first clock signal, the MSB bit begins to shift into MAX543, and in the subsequent clock cycle, the remaining bits are shifted in turn. After all the data are input, the LOAD terminal is delayed for 30ns, and the data enters the 12-bit DAC register to further control the NMOS mode select switch. 2 Analysis of the asynchronous serial port of TMS320F206 TMS320F206 is a fixed-point, static COMS digital signal processor produced by TI. It adopts an advanced Harvard structure (separating the bus of the data space and the address space), has on-chip peripherals, on-chip memory and a dedicated operation instruction set, which makes this device flexible and convenient to use. The asynchronous serial port of TMS320F206 can be used for data transmission in different periods. 2.1 Interface Pins and Registers The asynchronous serial port consists of the following pins: TX: The TX end sends serial data from the asynchronous serial port transmit shift register (AXSR). RX: The RX end receives serial data from the asynchronous serial port receive shift register (ARSR). IO0-IO3: General-purpose I/O ports can be set as general-purpose I/O ports or as UART handshake signals. Two on-chip registers perform data transmission and reception operations and control the operation of the port: ·Asynchronous Serial Control Register (ASPCR) The I/O address of ASPCR is FFF5H, including setting the port mode bit. Enable and disable automatic baud rate logic detection, select the number of stop bits, and enable or disable interrupts. Set IO0-IO3 and reset the port. ·I/O Status Register (IOSR) The I/O address of IOSR is FFF6H, including the input baud rate, various error conditions, and the status of data transmission. Detect breakpoints on the RX end, the status of IO0-IO3, and detect changes in IO0-IO3. 2.2 Setting of asynchronous serial port ASPCR controls the operation of asynchronous serial port. Figure 4 shows the format of 16-bit ASPCR. 2.3 Setting of I/O status register IOSR returns the status of asynchronous serial port and I/O port (IO0-IO3). Figure 5 shows the format of 16-bit IOSR register. The I/O address of IOSR is FFF6H. 3 Specific implementation of programmable amplifier controlled by TMS320F206 DSP asynchronous serial port 3.1 Analysis of circuit schematic diagram The specific implementation circuit schematic diagram is shown in Figure 6. The automatic range conversion circuit is composed of MAX543 and AD711J, a high-speed precision operational amplifier produced by AD. The signal is input by RFB of DAC, the reference voltage terminal (Vref) is connected to the signal output terminal, and the reverse output terminal of the operational amplifier is connected to the current output terminal of MAX543. In the interface part of MAX543 and DSP, the LOAD terminal is connected to XF, the clock signal is generated by IO0, and IO1 outputs the data for controlling the gain. Through this connection method, the R-2R resistor network of MAX543 plays the role of a precision adjustable resistor. 3.2 Relationship between digital input value and amplification factor of automatic range conversion circuit Figure 7 shows a simplified schematic diagram of the automatic range conversion circuit. Assume that the input voltage is Vi and the output voltage is V0. According to the R-2R resistor network diagram, the relationship between Vi and V0 is:

Where Dj corresponds to the value of each bit of the 12-bit control data output by the DSP.
This allows automatic adjustment of the range.

3.3 Design of TMS320F206 DSP D/A control program The TMS320F206 DSP D/A control program first initializes TMS320F206, all interrupts are masked, and the wait status register is cleared to 0. Initialize the asynchronous serial port, reset the serial port, set IO0-IO3 to output, and then activate the asynchronous serial port. In ADC initialization, set XF to 1, IO0 outputs 0, and assign a value to the control variable COUNT. Shift out the MSB bit from IO1, pass through delay program 1, and then change the clock signal to 1, and then pass through delay program 2 to change IO0 to a low level. Through the loop program, shift out data from IO1 in turn. When COUNT=0, all data are shifted out, XF is set to 0, and delay program 3 is executed. The data is transferred to the 12-bit DAC register, and then XF is set to 0, and a gain adjustment process ends. The program flow chart is shown in Figure 8. 4 Conclusion This article analyzes the method of implementing gain adjustment of the 12-bit serial D/A MAX543. By using the internal resistance network of D/A, the range can be measured quickly and accurately. This method has universal application significance and can be widely used in measurement systems with high speed and accuracy requirements.