Design of Taxi Fare Metering System Developed with VHDL Language

0 Introduction

Taxi metering systems are mostly controlled by single-chip microcomputers, but they are easily modified without permission, have a relatively high failure rate, and are difficult to upgrade. FPGAs are high-density, programmable, and have strong software support, so the designed products are powerful, reliable, and easy to modify.

This paper designs a taxi fare billing system based on FPGA, which can intuitively display the mileage of the taxi and the fees payable by the passengers.

1 System Function Design

The charging standard of the designed meter is: when the car travels within 3 km, only the starting price of 9.0 yuan is charged; after the car travels more than 3 km, the fare is charged at 2 yuan per kilometer. After the driving distance reaches or exceeds 9 km, the fare starts to be charged at 3.0 yuan per kilometer. When the car encounters a red light or stops in the middle, 0.5 yuan is charged every 3 minutes. If it stops (rst), the fare is reset and waits for the next charging to start. It is required to be able to display the mileage and the fare to be paid by the passenger, where the mileage is accurate to 0.01 km and the fare to be paid by the passenger is accurate to 0.1 yuan. The display range is: mileage is 0 to 99.99 kilometers, and the fare is 0 to 999.9 yuan.

2 System Design

The composition of the FPGA - based taxi fare system is shown in Figure 1. It consists of three parts: external input, FPGA control part and digital display. The FPGA part is composed of frequency division module, pricing module, BCD conversion module and dynamic decoding scanning module; the external input includes the start button (start), pause button (pause), stop button (stop or rst) and two pulse signals (respectively, the distance pulse signal pulse with one pulse every 20 m and the 32 MHz working pulse signal clk32M). The display module uses 8 LED digital tubes to display the mileage and fare respectively. The mileage displays 2 integers and 2 decimals, and the fare displays 3 integers and 1 decimal.

3. Design of each module

Design the FPGA control part, including the control pricing module, BCD conversion module, dynamic scanning decoding module and frequency division module. Use the hybrid design method, each sub-part is programmed with VHDL, and the top-level part is designed with schematic diagram.

3.1 Control pricing module (jijia)

The pricing control module consists of a mileage pricing module, a waiting pricing module, and a total price module.

The mileage charging module mainly counts the pulse signal pulse of the sensor (one pulse every 20m) to calculate the distance traveled by the taxi in this transaction and the mileage fee. Every 50 pulses count as 1 km, and the total distance is output by the lucheng terminal. Within 3 km, the mileage fee cf1 remains unchanged at 9 yuan. When it exceeds 3 km, p=1, and the mileage fee counting starts. When the charging stops, that is, the start port is set to "0" or the taxi stops driving, that is, the rst port is set to "0", the relevant data is reset and cleared.

Waiting for the billing module, after 3 km (p=1), whenever pause=1, it starts timing. When the number of second pulses reaches 180 (i.e. 3 minutes), the waiting fare cf2 is increased by 5, indicating that the fare is increased by 0.5 yuan.

The total price module adds the mileage charge and the waiting charge to calculate the total cost and outputs it from the chefei end.

3.2 BCD conversion module (zhuanhuan)

This module converts the fare and distance of the charging module into 4-digit decimal numbers for digital tube display. The input ports acf and bcf are the input ports for the total distance and total fee respectively. Both are binary codes for decimal coding counting. The encoder generates BCD code, and the output port uses BCD code to represent the data of units, tens, hundreds, and thousands. Aclk is the working pulse, that is, 32MHz.

3.3 Dynamic scanning module (dtxianshi)

This module consists of a dynamic scanning module and a decoding module. The dynamic scanning module uses the visual persistence effect and a dynamic scanning circuit to display the distance converted from octal and the 4-digit decimal number of the fare on the digital tube, saving hardware resources and energy. The module displays the distance and fare in turn through the octal scanning module. Port d is the input port for the selected address code, and A1, A2, A3, A4, B1, B2, B3, and B4 are the numerical input ports for ones, tens, hundreds, and thousands respectively. According to the input address code, the module only transmits one digit backward to the output port q at a time, and outputs the display control signal (dp) of the decimal point at the same time, so that the distance is displayed as 00.00 kilometers and the fee is displayed as 000.0 yuan.

Decoding module, this module translates the BCD code of 0-9 into the digital tube display code, the input port q input scanning module selects the BCD code to be displayed, and the translated digital tube display code is output by g[6..0]. The digital tube in this design is a common cathode digital tube.

3.4 Frequency division module (fenp)

The input system clock in this design is 32 MHz, which is divided and then the address of the digital tube is scanned. The input port rse is the taxi stop signal input port. When the taxi stops, the module stops working and is cleared. When the taxi is running, the input 32 MHz pulse signal is divided and the second pulse is obtained from the output port cp1 and the 32 Hz working pulse is obtained from cp32.

3.5 Overall Circuit

Connect each module according to the input-output relationship, and the top-level circuit schematic is shown in Figure 2. g[6…0] is the seven-segment display code output, which controls the display of 8 digital tubes in sequence through dynamic scanning, and dp is the decimal point.

4 System Simulation Verification

The timing simulation of each submodule and the top-level schematic diagram was carried out using MAX+plusⅡ software, and the simulation waveform is shown in Figure 3.

The simulation diagram of the control pricing module is shown in Figure 3. As shown in Figure 3(a), when reset=1, start=1, and pause=0, the taxi is in the driving state. At this time, the distance starts to increase. When it does not exceed 3 km, the fare is 5A, that is, 90, and the starting price is 9.0 yuan. As shown in Figure 3(b), when it exceeds 3 km, the fare increases by 20 (that is, 2 yuan) for every 1 km traveled. As shown in Figure 3(c), when reset= 1, start=1, and pause=1, the taxi is in the waiting state. At this time, the distance no longer increases, but the time increases. When the time reaches 3 minutes, the fare increases by 5 (that is, 0.5 yuan).

The simulation diagram of the top-level circuit is shown in Figure 4. As can be seen from the figure, as the input changes, the common cathode digital tube display code is output from g[6…0], and dp also outputs a high level at the corresponding digital tube to light up the decimal point. The software simulation results of this design are correct and achieve the expected goal.