An implementation scheme of embedded power grid monitor

The embedded power grid monitor successfully uses the hardware platform composed of S3C44BOX microprocessor and RTL8019AS Ethernet controller, and combines the embedded real-time operating system μC/OS-II and LwIP protocol stack. Driven by the real-time operating system and LwIP protocol stack, the microprocessor realizes the control functions of data acquisition, data processing and acquisition module. The embedded power grid monitor has a very high performance-price ratio and can directly replace conventional power transmitters, measuring and indicating instruments, electric energy meters and related auxiliary units. It has the characteristics of easy installation, simple wiring, convenient maintenance, small engineering workload, and field programmable input parameters. μC/OS-II is a preemptive real-time multitasking operating system with open source code suitable for embedded systems. This paper discusses the network communication implementation based on μC/OS-II embedded system, including the transplantation of μC/OS-II real-time operating system, LwIP protocol stack, the establishment of network device drivers and the scheduling of system tasks.

1 μC/OS-II porting

μC/OS-II is a priority-based preemptive multitasking real-time operating system that includes real-time kernel, task management, time management, inter-task communication synchronization (semaphore, mailbox, message queue) and memory management functions. It can make each task work independently without interfering with each other, and it is easy to achieve timely and error-free execution, making the design and expansion of real-time applications easy and greatly simplifying the application design process. In a multitasking system, the kernel is responsible for managing each task, or allocating CPU time to each task, and is responsible for communication between tasks. The basic service provided by the kernel is task switching. μC/OS-II can manage up to 64 tasks. Since its author occupies and reserves 8 tasks, there are up to 56 tasks left for user applications. The priorities given to each task must be different. This means that μC/OS-II does not support round-robin scheduling.

μC/OS-II is a complete, portable, curable, and customizable preemptive real-time multitasking kernel. Most of the code of μC/OS-II is written in ANSI C language, including a small part of assembly code, so that it can be used by microprocessors of different architectures. So far, from 8-bit to 64-bit, μC/OS-II has been running on more than 40 microprocessors of different architectures. μC/OS-II has been widely used around the world, including many fields, such as mobile phones, routers, hubs, uninterruptible power supplies, aircraft, medical equipment and industrial control. It is suitable for small control systems, with high execution efficiency, small footprint, excellent real-time performance and strong scalability. The minimum kernel can be compiled to 2KB.

When porting μC/OS-II, the system can run in user mode or supervision mode. Most ports run in supervision mode. If necessary, it can also be set to run in user mode, but the switching of processing modes must be completed by exception handling, which is more complicated.

The following introduces the main problems that need to be solved when transplanting μC/OS-II in this system.

(1) OS_CPU.H modification

This modification mainly changes the data types and macro definitions related to the processor and compiler. S3C44BOX is a 32-bit microprocessor and uses the armcc compiler. The Char type is 8 bits long, the Short type is 16 bits long, and the Int and Long types are 32 bits long. ARM registers are all 32 bits, so the stack data type OS_STK is declared as 32 bits. All stacks must be declared using OS_STK.

Define the interrupt switch macros OS_ENTER_CRITICAL and OS_EXIT_CRITICAL as functions ARMDisableINT and ARMEnableINT in OS_CPU_ASM.S to mask and enable interrupts.

(2) OSTaskStkInit()

OSTaskCreate() and OSTaskCreateExt() initialize the task's stack structure by calling OSTask-StkInit() so that the stack looks like an interrupt just occurred and all registers are saved to the stack.

μC/OS-II creates a stack for each task to save the processor registers. Its structure is defined as OS_STK[17]. The task stack space saves the processor working mode (SVC mode) pc, lr, r12, r11, r10...r1, r0, CPSR, SPSR from high to low.

In μC/OS-II OS_CPU_C.C, the task stack initialization function OSTaskStkInit needs to set the CPSR and SPSR in the task stack to SVC mode.

(3) OSCtxsw()

Used for task-level context switching. When a task actively requests CPU scheduling because it is blocked, OSCtxsw() is executed, and the task switching is performed in non-exceptional mode. Its job is to first save the CPU context of the current task to the task stack, then obtain the stack pointer of the highest priority task, and restore the CPU context of this task from the stack to continue execution. In this way, a task switch is completed.

(4) OSIntCtxSW()

It is used for task switching at the interrupt level. If a clock signal that a high-priority task is waiting for arrives in the clock interrupt ISR, the interrupted task will not be returned after the interrupt exits, but the ready high-priority task will be directly scheduled for execution, so that the high-priority task can be responded to as soon as possible to ensure the real-time performance of the system.

The work completed by OSIntCtxSW() is: writing a value to the INTCON register of S3C44BOX, writing the value of the interrupt CPU register saved in the IRQ stack to the interrupted task stack, and writing the content of the ready high-priority task stack to the corresponding CPU register.

(5) OSTickISR ( )

Clock interrupt processing function. Its main task is to handle clock interrupts and call the system to implement the OSTimeTick() function. If there is a high-priority task waiting for the clock signal, it needs to be scheduled for execution at the interrupt level.

OSTickISR() is a standard interrupt service routine. The entry of the function is written into the interrupt vector table of ISR. Its implementation process is: write any number to 0x18 of S3C44BOX (0x18 is the interrupt entry address of IRQ in ARM), read the status register of S3C44BOX to clear the interrupt, protect the CPU register and push it into the stack, call OSIntEnter() to add 1 to the interrupt nesting flag. Call the interrupt service routine OSTimeTick(), call OSIntExit() to determine whether task switching is required, and if necessary, call OSIntCtxSW() to perform task switching. If the task switching function OSCtxsw() is not called, it means that the work of pushing the CPU register into the stack has been completed when entering the interrupt.

2 Porting of LwIP protocol stack

lwIP is an open source TCP/IP protocol stack implementation from the Swedish Institute of Computer Science. lwIP is an implementation of the TCP/IP protocol stack. The lwIP protocol stack focuses on reducing memory usage and code size, so that lwIP can be used on small platforms with limited resources such as embedded systems. In order to simplify the processing process and memory requirements, lwIP has tailored the API so that some data does not need to be copied. LwIP is a Light Weight IP protocol that can run with or without operating system support. The focus of the LwIP implementation is to reduce the RAM usage while maintaining the main functions of the TCP protocol. Generally, it only needs a few hundred bytes of RAM and about 40K of ROM to run, which makes the LwIP protocol stack suitable for use in low-end embedded systems.

The following introduces the main steps of porting LwIP on the μC/OS-II operating platform.

2.1 Include files related to CPU or compiler

In cc.h, cpu.h, and perf.h in the /src/arch/include/arch directory, there are some definitions related to the CPU or compiler, such as data length, high and low bit order of words, etc. These parameters should be consistent with the data length and other parameters defined when implementing μC/OS-II.

2.2 Rewrite operating system related functions

sys_arch.c contains some structures and functions related to the operating system, which can be mainly divided into three parts.

(1) Inter-process communication function

The functions of sys_sem_new(), sys_sem_free(), sys_sem_signal(), sys_arch_sem_wait(), sys_mbox_new(), sys_mbox_free(), sys_mbox_post(), and sys_arch_mbox_fetch() are basically available in μC/OS-II, but it should be noted that the mbox here must be implemented using the message queue in μC/OS-II. However, μC/OS-II does not manage the messages in the message queue, so it cannot be used directly and must be re-implemented based on μC/OS-II. Some mboxes may only have one message, which can be implemented using a mailbox. In addition, the functions sys_sem_free() and sys_mbox_free() are not easy to implement, so the method of dynamic allocation and recycling from the free queue can be used.

(2)sys_arch_timeout()

In LwIP, each thread connected to the external network has its own timeout attribute, that is, the waiting timeout. This attribute is manifested as: each thread corresponds to a sys_timeout structure queue, including the timeout length of this thread and the timeout function that should be called after the timeout. This function can do some work to release the connection and recycle resources. If the sys_timeout corresponding to a thread is empty (NULL), it means that the thread will wait forever for the connection.

(3) sys_thread_new()

LwIP can run in single thread, that is, there is only one tcpip thread (tcpip_thread), which is responsible for handling all tcp/ucp connections, and various network programs interact with the network through the tcpip thread. However, LwIP can also run in multiple threads to improve efficiency and reduce programming complexity.

The function to create a new thread is:

void sys_thread_new(void(*thread)(void*arg), void*arg)

In μC/OS-II, there is no concept of thread, only task. It has provided the system API OSTask-Create to create new tasks. Therefore, as long as OSTaskCreate is encapsulated, sys_thread_new can be implemented. It should be noted that the thread in LwIP does not have the concept of priority in μC/OS-II. When implementing it, the user must assign priorities to the threads created in LwIP in advance.

2.3 Implementation of library functions in lib_arch

In the ARM SDT 2. development environment, the gcc compiler's lib library already has external functions related to the system CPU or editor in the LwIP protocol stack: strlen(), strcmp(), bcopy(), bzero(). You only need to write htons(), ntohs(), htonl(), and ntohl().

3 Network device drivers

The writing of the RTL8019AS network chip driver mainly involves setting the relevant registers. In the LwIP protocol stack, the network interface layer is responsible for receiving the upper layer IP datagram, assembling it into an incomplete physical frame and copying it to the controller's on-chip RAM, and sending it to the transmission medium through the controller. When sending, the controller assembles it into a complete physical frame; or first copies the received physical frame cached in the controller to the system memory, then extracts the IP datagram and hands it over to the IP layer for processing. Modify the ethernetif.c file to implement the bottom-level input and output.

RTL8019AS is a full-duplex plug-and-play Ethernet controller that integrates the RTL8019 core and a 16KB SDRAM memory on a single chip. It is compatible with RTL8019 control software and NE2000 8bit or 16bit transmission, supports UTP, AUI, BNC and PNP automatic detection modes, supports external flash memory read and write operations, supports full decoding of I/O port addresses, and has LED indication function.

3.1 Network card initialization function

void ethernetif_init（struct netif*netif）is used to initialize the network card and is called at the beginning of the program. It mainly completes the reset operation of the network card and determines the working mode of the network card by assigning values ​​to various registers.

3.2 Network card sending function

The function err_t ethernetif_output (struct netif*netif, struct pbuf*p, struct ip_addr*ipaddr) adds an Ethernet header to the IP packet sent from the IP layer and sends it through the network interface. RTL8019AS uses remote DMA to write the encapsulated Ethernet packet to the send buffer ring of the dual-port RAM inside RTL8019AS, and then starts local DMA, and the network card automatically sends the data in the buffer ring to Ethernet.

The sending process has three steps: encapsulation of data packets; sending data packets to the data send buffer through remote DMA; and sending data into FIFO for sending through the local DMA of RTL8019.

3.3 Network card receiving function

The function void ethernetif_input (struct netif*netif) receives Ethernet data packets from the network interface and sends the IP packets in it to the IP layer. The network card will automatically start the local DMA to receive data for the packets on the Ethernet destined for the network card, and store them in the receive buffer ring of the RAM inside the RTL8019AS chip, and then notify the CPU in the form of an interrupt. At this time, the function uses remote DMA to receive data into the system RAM.

3.4 Interrupt Handling Function

void ethernetif_isr (void) handles network card related interrupts. After RTL8019AS receives data, it passes the work of receiving data to the function ethernetif_input () through the interrupt entry.

In a real-time multitasking environment, interrupts are generally used to process the transmission and reception of RTL8019AS. Figure 1 is a typical interrupt handler (ISR) flow. When the main program responds to the interrupt of RTL8019AS, the entry of ISR will determine the direction of the program according to the value of the interrupt status register (ISR) read.