A Brief Analysis of Factors Affecting GaN Reliability and Testing Process and Standards

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The reliability of GaN (gallium nitride) HEMT (high electron mobility transistor) has actually been widely certified. On the one hand, in the power supply market, fast charging using GaN has been going on for several years. At the same time, in the communications market, the emergence of GaN has allowed the industry to abandon TWT (traveling wave tube) amplifiers and use GaN amplifiers as the output stage of many systems. The driver amplifiers in these systems still mainly use GaAs because this technology has been deployed in large quantities and is always improving. In addition, earlier applications were in LEDs, where GaN achieved an absolute competitive advantage.


However, to this day, although the application prospects of GaN in industrial and automotive grades have been proven countless times, the industry's biggest concern is still the reliability issue.


Reliability is related to expected service life, usually measured as mean time between failures. Reliability can be predicted and determined in advance through testing and measurement. Proving and improving device reliability is an ongoing process. It begins by stressing the device under test (DUT) until it fails, then identifying the failure mechanism, developing a failure model, and improving subsequent device design or manufacturing processes with the hope of having higher reliability.


Gallium Nitride (GaN) is a mature but still evolving power conversion technology. The operation and physical properties of GaN are different from those of silicon (Si). This means that new methods need to be developed to determine the reliability of GaN. In fact, several GaN companies have described their own reliability testing for GaN, which apparently exceeds the requirements of current industry guidelines and standards.


About Industry Guidelines : JEDEC and AEC-Q101 provide a starting point for further research into GaN reliability. The JEDEC JC-70.1 committee focuses on “GaN Power Electronics Conversion Semiconductor Standards” and has published two “guidelines” for evaluating GaN reliability, specifically JEP180.01 and JEP186.


JEP180.01 – provides “Guidelines for Switching Reliability Evaluation Procedures for Gallium Nitride Power Conversion Devices”. It includes guidelines for evaluating the switching reliability of GaN power HEMTs and ensuring their reliable use in power conversion applications. It is generally applicable to planar enhancement-mode, depletion-mode, GaN integrated power solutions, and cascode GaN power switches.


JEP186 – presents “Guidelines for Specifying Transient Turn-Off Withstand Voltage Robustness Metrics in Datasheets for GaN Power Conversion Devices”. JEP186 describes different techniques that can be used. It does not establish a preference for any type of specification presented, nor does the guideline address datasheet formatting. It also does not require the use of datasheet parameters in production testing, nor does it specify how to obtain these values; it is really just a general “guideline”.


Compared to the JEDEC guidelines, AEC-Q101 is a comprehensive test standard. It details everything a designer needs to know to achieve compliance, from sample size requirements to detailed test requirements and qualification requirements.


Examples of tests included in AEC-Q100 include high temperature reverse bias (HTRB), high humidity, high temperature reverse bias (H3TRB), high temperature gate bias (HTGB), and highly accelerated stress test (HAST). Notably, several GaN manufacturers did not start over for the new standard, but instead used ACE-Q100 and other industry standard tests and modified them to better suit the unique characteristics of GaN devices.


Compared to vertical Si devices, GaN devices are usually lateral structures. When the GaN HEMT is turned on, the current flows laterally from the source to the drain. The gate, source, and drain terminals are all on the top of the device. Unlike Si MOSFETs, GaN HEMTs do not have oxide dielectrics in the gate structure or pn drain-source junction. The lateral structure of GaN devices makes them more sensitive to humidity than Si MOSFETs.


It’s not just the structure; the device physics of GaN and Si are different. In a GaN HEMT, a thin, high-density layer of electrons called a two-dimensional electron gas (2DEG) forms between the GaN and AlGaN layers (Figure 1). When an enhancement-mode GaN HEMT is unbiased (OFF), the 2DEG layer under the gate is disrupted, preventing current from flowing. A sufficiently high positive gate-to-source voltage creates a vertical field under the gate that reforms the 2DEG, completes the circuit between drain and source, and turns on the device.

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Figure 1: Simplified cross section of a lateral enhancement-mode GaN HEMT showing the 2DEG layer. (Image: Infineon Technologies)


Validation testing needs to account for the numerous structural and device physics differences between Si and GaN devices. Some of the most important failure mechanisms to consider in GaN devices include charge trapping, hot carrier degradation, and time-dependent breakdown (TDB). TDB and hot carrier degradation also occur in Si devices.


TDB occurs in dielectrics due to high electric fields and causes increased leakage current, resulting in hard failure. It is considered in JEDEC JEP122H "Failure Mechanisms and Models for Semiconductor Devices".


Hot carrier degradation occurs in both Si MOSFETs and GaN devices. Hard switching generates hot carriers and creates defects in Si MOSFETs. In GaN devices, hot carrier degradation can cause wear and charge trapping.


Dynamic Ron


In GaN HEMTs, trapped electrons repel electrons in the 2DEG channel, reducing the available electrons in the channel and increasing the on-resistance (Ron) (Figure 2). Electrons can be trapped in the dielectric, buffer layers, and interfaces. Trapping is caused by high drain voltage when the device is off or by hot electrons when the device is switched on. The combined effect of the normal Ron of the device plus the increase in Ron due to charge trapping is called dynamic Ron. It is called dynamic because Ron can recover as the trapped charge is “released” or dissipated. If the de-trapping rate is low, dynamic Ron can have a larger impact. The impact of dynamic Ron needs to be evaluated using a time scale similar to the converter switching time.

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Figure 2: Trapped electrons reduce the number of electrons in the channel layer, increasing resistance. (Image: Texas Instruments)


Low duty cycles are best for verifying material quality and dynamic Ron. As the device ages, the density of trapped electrons increases, resulting in higher Ron. Devices with stable dynamic Ron (a decreasing rate of increase in trapped electrons over time) are important to minimize conduction losses and reduce premature failure.


Dynamic Ron is tested by applying the maximum rated DC VDS at the maximum rated temperature. If there are no failures after 1000 hours, the device is OK. At maximum temperature, applying DC VDS, available electrons come from the drain-source leakage current IDSS. To accelerate capture, voltages above the rated maximum are required. By using the hard-switching circuit included in JEDEC JEP17, orders of magnitude more potential trapped electrons can be generated, independent of temperature (Figure 3).

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Figure 3: The hard-switching circuit outlined in JEDEC JEP173 drives a high IDSS through the device at its maximum rated VDS. (Image: EPC)


Bathtub Curve Test


The “Bathtub Curve” represents the three phases of product reliability. It starts with the Early Life Failure (ELF) phase, where failures are relatively high in number and decreasing in frequency (Figure 4). Understanding the ELF phase is especially important when designing an accelerated aging process. ELF testing is also used to identify important device failure mechanisms. JEDEC JESD47K includes Early Life Failure (ELF) testing. The JEDEC and AEC tests discussed earlier are more relevant to the middle portion of the curve.

image.png

Figure 4: The JEDEC JESD47K certification standard places a greater emphasis on early failures. (Image: Transphorm)


Calculating the reliability of power converters is complex, with many different components and topology combinations. When GaN is added to the system, things become even more challenging for several reasons:


Performing accelerated life testing may cause non-GaN components to fail.

The correct speed-up factors for various converter topologies are not easy to identify.

From a practical standpoint, running a large number of power converters for long periods of time requires very large (and expensive) amounts of electrical energy.


Testing beyond the standard


GaN-specific reliability verification is not yet a mature area. Therefore, several GaN HEMT and GaN power IC suppliers have worked with power converter manufacturers and users to develop qualification methodologies that parallel and extend JEDEC and AEC-Q100. In most cases, this has resulted in the establishment of test durations that exceed those required in standard reliability test standards (Figure 5).

image.png

Figure 5: Testing beyond (standard) limits may involve extending the test cycle and using more devices. (Image: GaN Systems)


In addition to increasing the test duration relative to the industry standard, the number of parts tested can also be increased. AEC-Q requires testing three batches, each containing 77 devices. If all batches (231 devices) have zero failures, the device passes. If the number of devices tested increases, the reliability of the test will also increase. If the test is performed over a period of time, it can also provide information about the stability of the production process. For example, a manufacturer uses a 1000-hour HTRB to test more than 2000 devices, which are produced in 50 batches on the production line within a year.


Summary


The reliability of GaN HEMTs is unquestionable. However, due to differences in GaN material physics and GaN device structure compared to Si devices, new methods are being developed to quantify GaN reliability. Currently, JEDEC only provides guidelines for testing and measuring GaN device reliability. Several GaN manufacturers have worked with power converter manufacturers and users to address user concerns. They used the ACE-Q100 standard for Si devices as a starting point, while testing beyond these requirements, including longer test cycles and more DUTs, has accelerated the understanding of GaN reliability.

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