How to reduce signal coupling in RF design process

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How to reduce signal coupling in RF design process [Copy link]

The new wave of demand for Bluetooth devices, cordless phones and cellular phones is prompting Chinese electronic engineers to pay more and more attention to RF circuit design skills. The design of RF circuit boards is the most troublesome part for design engineers. If you want to succeed at the first time, careful planning and attention to details are two key design rules that must be highly valued.

Radio frequency (RF) circuit board design is often described as a "black art" because there are still many uncertainties in theory, but this view is only partially correct. There are also many principles and rules that can be followed in RF circuit board design that should not be ignored. However, in actual design, the real practical skill is how to compromise these principles and rules when they cannot be accurately implemented due to various design constraints.

Of course, there are many important RF design topics worth discussing, including impedance and impedance matching, dielectric materials and laminates, and wavelength and standing waves, but this article will focus on the various issues related to RF board partition design.

Cell phone design integrates everything in various ways, which is not good for RF board design. The industry is very competitive now, and everyone is looking for ways to integrate the most functions with the smallest size and the lowest cost. Analog, digital and RF circuits are all tightly packed together, with very little space to separate their problem areas, and the number of board layers is often minimized for cost reasons. Incredibly, multi-purpose chips can integrate multiple functions on a very small die, and the pins connecting to the outside world are arranged very closely, so RF, IF, analog and digital signals are very close, but they are usually electrically unrelated. Power distribution can be a nightmare for designers. In order to extend battery life, different parts of the circuit are time-sharing according to need, and the switching is controlled by software. This means that you may need to provide 5 or 6 operating power supplies for your cell phone.

RF Layout Concepts

When designing RF layout, there are several general principles that must be met first:

Isolate the high-power RF amplifier (HPA) and low-noise amplifier (LNA) as much as possible. Simply put, keep the high-power RF transmit circuit away from the low-power RF receive circuit. If you have a lot of physical space on your PCB, you can do this easily, but there are usually many components and the PCB space is small, so this is usually not possible. You can put them on both sides of the PCB, or let them work alternately instead of working at the same time. High-power circuits sometimes also include RF buffers and voltage-controlled oscillators (VCOs).

Make sure there is at least one whole ground plane in the high power area of the PCB, preferably without vias. Of course, the more copper the better. Later, we will discuss how to break this design principle as needed and how to avoid the problems that may arise from it.

Chip and power supply decoupling is also extremely important, and several methods of implementing this principle will be discussed later.

The RF output usually needs to be located away from the RF input, which we will discuss in more detail later.

Sensitive analog signals should be kept as far away from high-speed digital signals and RF signals as possible.

How to partition?

Design partitions can be decomposed into physical partitions and electrical partitions . Physical partitions mainly involve issues such as component layout, orientation, and shielding; electrical partitions can be further decomposed into partitions for power distribution, RF routing, sensitive circuits and signals, and grounding.

First, let's discuss the issue of physical partitioning. Component layout is the key to achieving an excellent RF design. The most effective technique is to first fix the components on the RF path and adjust their orientation to minimize the length of the RF path, keep the input away from the output, and separate the high-power circuit and the low-power circuit as far as possible. PCB wiring is completed, circuit board proofing https://www.jiepei.com/ You can find Jiepei

The most effective circuit board stacking method is to arrange the main ground plane (main ground) on the second layer below the surface layer, and run the RF line on the surface layer as much as possible. Minimizing the size of the vias on the RF path can not only reduce the path inductance, but also reduce the number of cold solder joints on the main ground and reduce the chance of RF energy leaking to other areas in the stacked board.

In physical space, linear circuits such as multi-stage amplifiers are usually sufficient to isolate multiple RF areas from each other, but duplexers, mixers, and intermediate frequency amplifiers/mixers always have multiple RF/IF signals interfering with each other, so this effect must be carefully minimized. RF and IF traces should be crossed as much as possible, and a ground plane should be placed between them as much as possible. The correct RF path is very important to the performance of the entire PCB board, which is why component layout usually takes up most of the time in the design of cellular phone PCB boards.

On a cell phone PCB, you can usually place the low noise amplifier circuit on one side of the PCB and the high power amplifier on the other side, and finally connect them to the antennas at the RF and baseband processor ends on the same side through a duplexer. Some tricks are needed to ensure that the straight through hole does not transfer RF energy from one side of the board to the other side. A common technique is to use blind holes on both sides. The adverse effects of straight through holes can be minimized by arranging them in areas on both sides of the PCB that are not subject to RF interference.

Sometimes it is not possible to ensure sufficient isolation between multiple circuit blocks. In this case, it is necessary to consider using a metal shield to shield the RF energy within the RF area. However, metal shields also have problems. For example, the cost and assembly cost of the metal shield are very expensive; it is difficult to ensure high precision when manufacturing irregular metal shields, and rectangular or square metal shields impose some restrictions on component layout; metal shields are not conducive to component replacement and fault location; because the metal shield must be soldered to the ground and must maintain an appropriate distance from the components, it takes up valuable PCB board space.

It is very important to ensure the integrity of the shield as much as possible. The digital signal lines entering the metal shield should be routed on the inner layer as much as possible, and it is best if the PCB layer below the routing layer is the ground layer. The RF signal line can go out from the small gap at the bottom of the metal shield and the wiring layer at the ground gap, but as much ground as possible should be laid around the gap, and the ground on different layers can be connected together through multiple vias.

Despite the above issues, metal shields are very effective and are often the only solution for isolating critical circuits.

In addition, proper and effective chip power decoupling is also very important. Many RF chips that integrate linear circuits are very sensitive to power supply noise. Usually, each chip needs to use up to four capacitors and one isolation inductor to ensure that all power supply noise is filtered out).

The minimum capacitor value is usually determined by its self-resonant frequency and low pin inductance, and the value of C4 is selected accordingly. The values of C3 and C2 are relatively large due to their own pin inductance, so the RF decoupling effect is poor, but they are more suitable for filtering lower frequency noise signals. Inductor L1 prevents RF signals from coupling from the power line to the chip. Remember: all traces are potential antennas that can both receive and transmit RF signals. In addition, it is also necessary to isolate the induced RF signals from critical lines.

The physical location of these decoupling components is also usually critical. The layout principles of these important components are: C4 should be as close to the IC pin as possible and grounded, C3 must be closest to C4, C2 must be closest to C3, and the connection between the IC pin and C4 should be as short as possible. The ground ends of these components (especially C4) should usually be connected to the ground pin of the chip through the next ground layer. The vias connecting the components to the ground layer should be as close to the component pads on the PCB board as possible. It is best to use blind holes punched on the pads to minimize the inductance of the connection line. The inductor should be close to C1.

An integrated circuit or amplifier often has an open-drain output, so a pull-up inductor is needed to provide a high-impedance RF load and a low-impedance DC supply. The same principle applies to decoupling the supply at the inductor end. Some chips require multiple power supplies to work, so you may need two or three sets of capacitors and inductors to decouple them separately, which may be troublesome if there is not enough space around the chip.

Remember that inductors should rarely be placed in parallel, as this will form an air-core transformer and induce interference signals, so the distance between them should be at least equal to the height of one of the components, or arranged at right angles to minimize their mutual inductance.

The principles of electrical partitioning are largely the same as physical partitioning, but there are some additional factors involved. Some parts of modern cell phones use different operating voltages and are controlled by software to extend battery life. This means that cell phones need to run on multiple power supplies, which brings more problems to isolation. Power is usually introduced from the connector and immediately decoupled to filter out any noise from outside the circuit board before it is distributed after a set of switches or regulators.

The DC current of most circuits in a cellular phone is quite small, so the trace width is usually not a problem. However, a separate high-current line as wide as possible must be run for the power supply of the high-power amplifier to minimize the transmission voltage drop. In order to avoid too much current loss, multiple vias are required to transfer current from one layer to another. In addition, if the power pin of the high-power amplifier is not adequately decoupled, high-power noise will radiate to the entire board and cause various problems. The grounding of the high-power amplifier is quite critical and often requires a metal shielding cover to be designed for it.

In most cases, it is also critical to ensure that the RF output is far away from the RF input. This also applies to amplifiers, buffers, and filters. In the worst case, if the outputs of amplifiers and buffers are fed back to their inputs with proper phase and amplitude, they may self-oscillate. In the best case, they will be stable under all temperature and voltage conditions. In fact, they may become unstable and add noise and intermodulation signals to the RF signal.

If the RF signal line has to go back from the input of the filter to the output, this may seriously damage the bandpass characteristics of the filter. In order to achieve good isolation between the input and output, first of all, a circle of ground must be laid around the filter, and then a piece of ground must be laid in the lower area of the filter and connected to the main ground around the filter. It is also a good idea to keep the signal lines that need to pass through the filter as far away from the filter pins as possible. In addition, the grounding of various places on the entire board must be very careful, otherwise you may unknowingly introduce a coupling channel that you do not want to happen. Figure 3 illustrates this grounding method in detail.

Sometimes you can choose to run single-ended or balanced RF signal lines, and the principles of cross-interference and EMC/EMI also apply here. Balanced RF signal lines can reduce noise and cross-interference if they are routed correctly, but their impedance is usually higher, and to maintain a reasonable line width to obtain an impedance that matches the signal source, routing, and load, the actual routing may be somewhat difficult.

Buffers can be used to improve isolation because they can split the same signal into two parts and use them to drive different circuits. In particular, a local oscillator may need a buffer to drive multiple mixers. When the mixer reaches the common-mode isolation state at the RF frequency, it will not work properly. The buffer can isolate the impedance changes at different frequencies well, so that the circuits will not interfere with each other.

Buffers are very helpful in designs because they can be placed right after the circuits that need to be driven, making the high-power output traces very short. Since the input signal levels of the buffers are relatively low, they are less likely to interfere with other circuits on the board.

There are many very sensitive signal and control lines that require special attention, but they are beyond the scope of this article and are therefore only briefly discussed without further explanation.

Voltage controlled oscillators (VCOs) convert changing voltages into changing frequencies, a property used for high-speed channel switching, but they also convert minute amounts of noise on the control voltage into minute frequency changes, which adds noise to the RF signal. In general, there is no way to remove noise from the RF output signal after this stage. So where is the difficulty? First, the desired bandwidth of the control line may range from DC to 2MHz, and it is almost impossible to remove such a wide bandwidth of noise by filtering; second, the VCO control line is usually part of a feedback loop that controls the frequency, and it is possible to introduce noise in many places, so the VCO control line must be handled very carefully.

Make sure that the ground of the lower layer under the RF trace is solid, and that all components are firmly connected to the main ground and isolated from other traces that may bring noise. In addition, make sure that the power supply of the VCO has been fully decoupled. Since the RF output of the VCO is often a relatively high level, the VCO output signal can easily interfere with other circuits, so special attention must be paid to the VCO. In fact, the VCO is often placed at the end of the RF area, and sometimes it also requires a metal shielding cover.

The tank circuit (one for the transmitter and the other for the receiver) is related to the VCO but has its own characteristics. In simple terms, the tank circuit is a parallel resonant circuit with a capacitive diode that helps set the VCO operating frequency and modulate voice or data onto the RF signal.

All VCO design principles also apply to resonant circuits. Resonant circuits are usually very sensitive to noise because they contain a relatively large number of components, have a wide distribution area on the board, and usually operate at a very high RF frequency. Signals are usually arranged on adjacent pins of the chip, but these signal pins need to work with relatively large inductors and capacitors, which in turn requires that these inductors and capacitors be located very close together and connected back to a control loop that is very sensitive to noise. This is not easy to achieve.

The automatic gain control (AGC) amplifier is also a problem area. Both the transmitting and receiving circuits have AGC amplifiers. AGC amplifiers can usually effectively filter out noise, but because cellular phones have the ability to handle rapid changes in the strength of transmitted and received signals, the AGC circuit is required to have a fairly wide bandwidth, which makes it easy for the AGC amplifiers on certain key circuits to introduce noise.

Good analog circuit design techniques must be followed when designing the AGC circuit, which involves very short op amp input pins and very short feedback paths, both of which must be kept away from RF, IF or high-speed digital signal traces. Likewise, good grounding is essential, and the chip's power supply must be well decoupled. If a long trace must be run at the input or output, it is best to run it at the output, which usually has much lower impedance and is less prone to noise induction. Generally, the higher the signal level, the easier it is to introduce noise into other circuits.

In all PCB designs, it is a general principle to keep digital circuits away from analog circuits as much as possible, which also applies to RF PCB design. Common analog ground and ground used for shielding and separating signal lines are usually equally important. The problem is that if there is no foresight and careful planning in advance, there is little you can do in this regard. Therefore, in the early stages of design, careful planning, thoughtful component layout and thorough layout evaluation are very important. Design changes caused by negligence may cause a nearly completed design to have to be torn down and re-designed. This serious consequence caused by negligence is not a good thing for your personal career development anyway.

Similarly, RF lines should be kept away from analog lines and some critical digital signals. All RF traces, pads and components should be filled with ground copper as much as possible and connected to the main ground as much as possible. Micro-via construction boards similar to breadboards are very useful in the RF circuit development stage. If you choose a construction board, you can use many vias at will without any cost. Otherwise, drilling holes on ordinary PCB boards will increase development costs, which will increase costs in mass production.

If the RF traces must cross the signal lines, try to lay a layer of ground between them along the RF traces that is connected to the main ground. If this is not possible, make sure they are crisscrossed, which can minimize capacitive coupling, and at the same time, lay as much ground as possible around each RF trace and connect them to the main ground. In addition, minimizing the distance between parallel RF traces can minimize inductive coupling.

A solid, monolithic ground plane works best when placed directly under the top layer on the first layer, although other approaches can work with careful design. I have tried splitting the ground plane into several pieces to isolate analog, digital, and RF lines, but I have never been happy with the results because I always end up with some high-speed signal lines running through the split grounds, which is not a good thing.

On each layer of the PCB, lay out as many grounds as possible and connect them to the main ground. Put the traces together as much as possible to increase the number of plots on the internal signal layer and power distribution layer, and adjust the traces appropriately so that you can place the ground connection vias to the isolated plots on the surface layer. You should avoid generating free grounds on each layer of the PCB because they will pick up or inject noise like a small antenna. In most cases, if you can't connect them to the main ground, then you'd better remove them.

When you get an Engineering Change Order (ECO), stay calm and don't wipe out all your hard work. An ECO can easily throw your work into disarray, no matter how minor the changes required are. When you have to complete a job within a certain time frame, it's easy to forget something critical, let alone make changes.

Whether it is a "black art" or not, following some basic RF design rules and paying attention to some good design examples will help you complete RF design work. Successful RF design can only be achieved by paying careful attention to every step and every detail in the entire design process, which means that thorough and careful planning must be carried out at the beginning of the design, and comprehensive and continuous evaluation of the progress of each design step.