Principles and advantages of PMIC

Application-Specific Integrated Circuits (ASICs) are systems designed and optimized for target applications such as industrial, automotive, IoT, mobile, medical, and home automation. Complex ASICs may contain different components such as microprocessors, interfaces, and peripheral functions, ultimately forming a System on Chip (SoC). The complex design of SoCs requires additional power rails to provide different currents and voltages. These should be powered separately under careful control.

A complex PMIC contains several digital and analog functional blocks. The analog circuits regulate sensing and monitoring through the controller to control power-up sequencing and PMIC operation. The controller circuit can accommodate programmable logic, microcontrollers, or state machines. Standard power management includes the use of DC-DC converters, low dropout (LDO) linear regulators, safety functions, and voltage monitoring functions.

For example, smartphones have attributes enhanced by powerful application processors and lightweight batteries that power GPS, multiple sensors, Bluetooth, NFC, cameras, radios, Wi-Fi, and cellular wireless. These phones incorporate multiple PMICs to dynamically manage usage and battery life. Figure 1 below shows the Multiple PMIC concept introduced by NXP to optimize different blocks, such as compute, security, and peripherals for a multi-processor system.

Figure 1: Concept of multiple PMICs for a complex SoC (Image source: NXP Semiconductors)

PCB design with PMIC

Power density, signal cross-coupling, component placement, and PCB layer count are key areas that designers must consider. The complex integration of multiple power supplies in a single PMIC package can make PCB design difficult.

Before floorplanning the said PCB layout with different dedicated ground planes, signal layers and power planes, the PCB stackup (number of PCB layers) must be considered. Good layer stackup is crucial for differential mode emissions, external noise susceptibility, common mode emissions, crosstalk and electrical performance.

Component placement is essential to any good PCB layout. Components can be placed in different ways depending on the specific application. Each PCB must be properly tuned and multiple trade-offs may be required. During component placement, it is critical to start with the PMIC input pins because the input capacitors are used as a local power supply, especially for transient power requirements.

PMIC performance is critical to data integrity and should be protected from hazards such as interference and corruption. The layout must keep attackers away from noise-sensitive signals and protect sensitive signals from other attackers.

Planes and signals form another standard PMIC routing layout consideration. It is recommended that the second layer (below the component mounting layer) be used as a ground plane because the IC must have a low impedance ground. The ground impedance can be effectively reduced by components such as input capacitors, resulting in low parasitic effects through the connection. The ground plane can also act as a shield for inductive and capacitive noise sources on this component mounting layer.

When routing a PCB for a PMIC, the buck converter must be considered first because the buck converter includes a switching power supply, which has a powertrain integrated inside the IC. The ground pins and inputs of the converter usually carry a large amount of high-frequency switching current. Minimize inductance and resistance by routing with thick traces. Reduced resistance minimizes unnecessary power losses, and low inductance minimizes switching voltage spikes, ensuring reliable operation. Trace inductance as low as 1 nH can cause problems. Thicker traces provide efficient, reliable operation for the system and converter, and improve line transient response. If the input capacitor and pins are kept close together, the routing distance is kept to a minimum, making it easier to achieve low-impedance routing. Another advantage of this arrangement is that the chance of inductive coupling is reduced because the input pin connections carry switching currents at ultra-fast edge rates.