UCC28700 is a constant voltage, constant current flyback controller that can achieve primary side regulation without the use of an optocoupler. Figure 1 is the application circuit of UCC28700.
Figure 1: UCC28700 application circuit
In Figure 1:
RSTR is the high voltage startup resistor;
CDD is the energy storage capacitor on the VDD pin;
RS1 is the high-side feedback resistor;
RS2 is the low-side feedback resistor;
RCBC is the programmable cable compensation resistor;
RCS is the primary peak current programming resistor;
RLC is the compensation programming resistor for the MOSFET turn-off delay.
The primary peak current is an important factor in the startup of the UCC28700 under constant current full load conditions. We will analyze it in detail below.
2. Analysis
Figure 2 is the secondary circuit of UCC28700, IS=IC+IL. If the load of UCC28700 device is resistance at the beginning of startup, VO will rise from zero, and IL is low enough, so high IS is not needed. But if the load of the device is constant current, and the load current is large, high IS is needed to keep IC positive to shorten the time required for the output voltage to rise from 0 to VOCC. VOCC is the minimum target converter output voltage, which makes the auxiliary turn voltage equal to the UVLO shutdown voltage on the VDD pin.
Figure 2: UCC28700 secondary circuit
For CDD, CO and transformer, the following equations are provided. In Equation 4, a current margin of 1 mA is provided.
Note: NP is the primary turns of the transformer, NS is the secondary turns, and NA is the auxiliary turns.
(1)
(2)
(3)
(4)
(5)
in:
VDD(off) is the UVLO turn-off voltage.
VDD(on) is the UVLO turn-on voltage.
Irun is the power supply current on the VDD pin when UCC28700 is working.
VDD is the CDD voltage.
ΔVDD is the reduced voltage on CDD.
ta is the time taken for the output voltage to rise from 0 to VOCC.
According to the above equation, if the IS value is low, IC will be small, so the time ta required for the output voltage to rise to VOCC will be longer. However, during this time, VDD may drop below VDD(off) and the UCC28700 device may enter the UVLO state and stop switching. The current through RSTR can then charge CDD. When VDD is higher than VDD(on), the device will restart. Although the fault startup will continue, the UCC28700 device cannot enter the normal state.
In equation 4, if CDD is large enough, ΔVDD will be small for a specific ta. Therefore, a large CDD value and a high primary peak current will allow the UCC28700 to start up smoothly. However, a large CDD value means a higher price and a larger size, and a high primary peak current will increase power consumption and transformer size. Therefore, there is a trade-off in choosing CDD and primary peak current.
In normal operation, VDD is determined by the auxiliary winding voltage. If VO reaches its maximum value, VDD will also reach its maximum value. This relationship is shown in Equation 6.
(6)
It can be seen from equations 2, 3 and 6 that if NA increases, ta will decrease, which will be beneficial to the startup of UCC28700. Therefore, NA should also be selected to be a larger value, and voltage margin must be provided for VDD.
3. Design
Except for CDD and RCS, all component values are the same as in the UCC28700EVM-068 5-W USB adapter [1] schematic. Figure 3 is taken from the UCC28700 data sheet [2]. IS can be calculated using Equation 7, where ηXFMR is the estimated transformer efficiency.
Transformer efficiency is affected by core and winding losses, leakage inductance ratio, and the ratio of bias power to rated output power. For a 5V, 1A charger, 1.5% bias power is a good estimate [1]. An overall transformer efficiency of 90% is a rough estimate, which includes 3.5% leakage inductance, 5% core and winding losses, and 1.5% bias power [1].
The maximum primary peak current IPP appears at the beginning of startup, and then the UCC28700 device enters a constant current regulation state, maintaining a constant secondary diode conduction duty cycle of 0.425.
The transformer is WE 750312723 on the EVM, with NP/NS=15.33, NP/NA=3.83, and a saturation current of 440mA.
Figure 3: Transformer current
(7)
At the beginning of startup, the average charging current of the output capacitor is positive, and the charging current is equal to (IS-IL), as shown in Equation 1. Before VO rises to VOCC, the auxiliary turn voltage is lower than VDD, and CDD cannot be charged through the auxiliary turn. However, during this period, CDD is discharged by Irun and the gate drive current. If VDD is lower than VDD(off), the UCC28700 device will be turned off. To ensure a smooth startup of the device, VDD must be greater than VDD(off) within ta. In Equation 8 and Equation 9, a critical condition is applied. Tstart is the time for VO to rise from 0 to VOCC. Equation 2 is the relationship between VOCC and VDD(off). In Equation 8, there is an estimated gate drive current of 1mA, and a margin of 1V is added to VDD. VCST is the chip select threshold voltage. At the beginning of startup, the voltage on the UCC28700 VS pin is low, so VCST remains at its maximum value.
(9)
(10)
As shown in Table 1, the UCC28700 device has better constant current (CC) regulation performance and higher maximum operating frequency, which can minimize the solution size. The standby power consumption is less than 30mW, which meets the five-star rating requirements. Higher maximum VDD can reduce the VDD capacitor value. Among the three products highlighted in Table 1, the UCC28700 device is the best choice for designing a 5V adapter. The UCC28700 device can select a higher NA/NS because it has a higher maximum VDD according to Equation 2, which can achieve a shorter tstart (see Equation 9). In Equation 8, tstart is proportional to CDD, so a smaller CDD is required in the design.
Table 1: Parameter comparison table
4. Experiment
To verify the above analysis, we used a UCC28700EVM-068 5-W USB adapter. Except for CDD and RCS, all component values remained unchanged, CDD = 4.7μF, RCS = 1.8Ω. The load was a constant current of 1A.
Figure 4 is the startup waveform of UCC28700, CH1 is the MOSFET gate drive signal, and CH3 is the output voltage. The device starts smoothly without overshoot and audible noise. The figure shows that the UCC28700 device has very good startup performance. In Figure 4, tstart is close to 18ms, which is consistent with the calculated result.
Figure 4: UCC28700 startup waveform
Figure 5, Figure 6 and Figure 7 are comparative experiments. CH1 is the VDD voltage and CH3 is the output voltage.
In Figure 5, CDD = 4.7 μF, RCS = 2.05 Ω: Since the primary peak current is not large enough, VDD drops below VDD(off), so the UCC28700 device cannot start up.
In Figure 6, CDD = 4.7 μF, RCS = 1.8 Ω: The primary peak current is increased, so good startup performance is observed.
In Figure 7, CDD = 4.7 μF, RCS = 2.05 Ω: The UCC28700 device cannot start up because the capacity of CDD is not sufficient to provide enough energy.
The experimental results show that both the large primary peak current and the large CDD capacity can enable the UCC28700 to start successfully under constant current full load. These results confirm the above analysis.
Figure 5: UCC28700 startup waveform when CDD = 4.7μF, RCS = 2.05Ω
Figure 6: UCC28700 startup waveform when CDD = 4.7μF, RCS = 1.8Ω
Figure 7: UCC28700 startup waveform when CDD = 1μF, RCS = 1.8Ω
5 Conclusion
The comparison results show that the UCC28700 device has better characteristics in CV and CC regulation, solution size, standby power consumption and VDD capacitor value. In this study, we analyzed and calculated the primary peak current and VDD capacitor. Then, we selected the appropriate parameters according to the equation, and then verified the analysis through experimental results.
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