UCC587x-Q1 power-on false alarm mechanism and initialization precautions

CC587x-Q1 integrates a rich diagnostic protection mechanism, making it very suitable for new energy vehicle electric drive applications and helping the system achieve the ASIL-D functional safety level. On the other hand, due to its rich and flexible built-in registers, you need to pay attention to the configuration of the registers during power-on initialization, otherwise it may easily cause false alarms of certain faults. This article will describe the usage scenarios, mechanisms and avoidance methods of false alarms SC_FAULT and ADC_FAULT during power-on.

SC_FAULT

Configure scenarios

UCC587x-Q1 has up to 6 ADC input pins, including AI2, AI4, AI6

It can be used as a detection pin for short-circuit fault of the power switch tube (default). The voltage threshold corresponding to short circuit triggering is lower (default 1V, configurable up to 1.25V). Therefore, if one of AI2, AI4 and AI6 is used to sample physical quantities with a wide maximum voltage range (such as VCC2 of UCC587x-Q1 itself or the value of the high-voltage bus voltage after voltage division), and no attention is paid to the timing of software configuration , it is very easy to trigger SC_FAULT by mistake, thus causing unexpected output.

False alarm mechanism

However, automotive electric drive usage scenarios usually require sampling physical quantities with a wide voltage range from multiple channels, such as the VCC2 of the UCC587x-Q1 itself or the high-voltage bus voltage mentioned earlier. On the other hand, in order to improve the sampling resolution, the voltage dividing ratio cannot be adjusted too small. Therefore, when it is unavoidable to use one of AI2, 4, and 6 to sample physical quantities with a wide range, you need to understand the conditions for SC_FAULT triggering to avoid SC_FAULT false triggering.

SC_FAULT trigger needs to meet the following conditions at the same time:

The voltage on the Aix (2, 4, or 6) pin needs to be higher than the value configured by CFG6 [SCTH] and lasts above CFG6 [SC_BLK]

Input (IN+ or ASC) is high level

Drive output to high level

CFG4[SCP_DIS] = 0x0

DOUTCFG［AIxOCSC_EN］ = 0x1

How to avoid

The aforementioned five trigger conditions need to be met at the same time to trigger the SC_FAULT fault, and the first three conditions are directly related to the hardware configuration. Often, changes cannot be made after considering practical issues. Therefore, we can avoid the false triggering of SC_FAULT during the power-on initialization phase by adjusting the software configuration, but we need to pay attention to the timing of the software configuration.

As mentioned before, the first condition is easily met. When the software is configured according to the default values ​​(conditions 4 and 5 are met) and enters the active mode to start output (conditions 2 and 3 are met), these five conditions can be met and the report SC_FAULT fault occurred. In this case, we can easily avoid it by configuring DOUTCFG [AIxOCSC_EN] = 0x0 of the corresponding channel during the initialization phase.

However, the above scenarios cannot be guaranteed to be foolproof. In order to save IO port resources and simplify the secondary-side power supply configuration, VREF often uses the internal power supply mode, and the ASCpin will be directly pulled up to the VREF on the secondary side of the chip. ASC_EN is pulled up to VREF through a MOSFET, and the conduction of the MOSFET is bysafety

MCU to control. If ASC is triggered due to a specific fault during the power-on initialization process, the SC_FAULT fault may be falsely reported. Therefore, here you need to pay attention to the configuration timing of VREF enablement (CFG8 [VREF_SEL]) and DOUTCFG [AIxOCSC_EN]. Be sure to disable SCP (DOUTCFG [AIxOCSC_EN] = 0x0) before VREF is enabled (CFG [VREF_SEL] = 0x0). Avoid the situation where the above five conditions are met simultaneously during the power-on configuration process, thereby avoiding false alarms of SCP_FAULT.

ADC_FAULT

Configure scenarios

The VREF of UCC587x-Q1 is the reference power supply of the internal ADC. VREF can be adjusted through CFG8 [VREF_SEL] to determine whether the power supply source is internal or external. The default configuration of VREF is external mode. When the VREF voltage exceeds the threshold and an undervoltage or overvoltage fault occurs, STATUS5 [ADC_FAULT] will report an error, but the fault is blocked by default, that is, the fault will not be reported through nFLT1 and will not affect the driver output. For cost considerations, customer designs may choose to save external power and choose VREF to be provided internally. At this time, attention needs to be paid to the handling of ADC_FAULT during power-on initialization.

False alarm mechanism

After the ADC is enabled, ADC_FAULT can report an error, and the external power supplies of ADC_EN and VREF are default. When there is no external power supply to the VREFpin, or the supply voltage exceeds the threshold, the device may report an ADC_FAULT fault after powering on.

How to avoid

If you need to configure VREF into internal mode, it is recommended to configure CFG8 into internal mode after powering up and entering Configuration 2 mode, and then read all fault status bits. If ADC_FAULT is the only fault, it can be cleared by writing CLR_STAT_REG=1 ADC_FAULT fault bit. If ADC_FAULT needs to be monitored during normal operation, ADC_FAULT_P is set last. That is, be sure to set the ADC fault mask enable bit ADC_FAULT_P after VREF is configured in internal mode.

Summarize

UCC587x-Q1 has rich diagnostic functions. While providing more complete diagnostic coverage, if you do not pay attention to the software configuration timing after power-on, ADC_FAULT and SC_FAULT may be falsely reported in specific application scenarios. We can avoid this type of false positive problem through the configuration methods mentioned in this article.