Research on CD4518 logic function test circuit

Publisher:CrystalBreezeLatest update time:2014-07-23 Source: 21ICKeywords:CD4518 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

The decimal counting circuit is an important part of digital electronic technology and is widely used. However, the logical function of this circuit is relatively abstract, difficult to understand, and not easy for students to master. To this end, we designed a logic function test circuit based on the CD4518 decimal counter. Students deduced the logical function of CD4518 based on the test results of the circuit, thus solving this problem.

1. Task Requirements

Design and assemble the CD4518 logic function test circuit according to the circuit schematic diagram. After checking that it is correct, connect the +5V power supply and use a single pulse generator to provide an input pulse signal to the test circuit. Derive the logic function of CD4518 based on the test results.

2. Introduction to CD4518

CD4518 is a CMOS dual BCD synchronous decimal counter, as shown in Figure 1. Its pin functions are:

① 1 CP, 2 CP: Clock input terminal, rising edge valid. ②1EN, 2EN: Clock input terminal, falling edge valid. ③1CR, 2CR: Direct zero (reset) terminal. ④1Q0~1Q3, 2Q0~2Q3: Four-bit trigger output terminal (BCD code). ⑤VDD: Positive power supply.

⑥Vss: Negative pole of power supply.

 

 

3. Circuit Assembly and Testing

The CD4518 logic function test circuit consists of two parts: the CD4518 decade counter and the LED light-emitting diode indicator circuit. In order to facilitate the test, a single pulse generator needs to be designed to provide the input pulse signal.

1. Assembly and testing of single pulse generation circuit

The single pulse generator is designed and assembled based on the NAND gate integrated block CD4011, and is used as the input pulse of the CD4518 logic function test circuit. The circuit is shown in Figure 2.

 

 

Working process of single pulse generating circuit: when the switch is at position 1, the output Vo = "0", because the output end is added to the input end through feedback to realize the self-locking function, so when the switch is in the middle position from 1 to 2, the output is still "0" due to the self-locking function; when the switch is at position 2, the output Vo = "1", similarly, the output end is added to the input end through feedback to realize the self-locking function, so the output has only two states: "0" and "1".

Note that when the switch is moved from position 1 to position 2, the output state changes from "0" to "1", that is, a rising edge signal is generated; when the switch is moved from position 2 to position 1, the output state changes from "1" to "0", that is, a falling edge signal is generated.

2. Assembly and testing of CD4518 logic function test circuit

1) Circuit fabrication

First, count and test the components according to the component list of the CD4518 logic function test circuit (Table 1), and fill in the test results in the table. Then, according to the circuit schematic (Figure 3), complete the circuit assembly operation.

 

 

 

2) Circuit testing

After the CD4518 logic function test circuit is assembled and checked, connect the +5V power supply and input the single pulse signal provided by the single pulse generator to the test circuit to observe the output phenomenon of the test circuit. We use the light-emitting diode in the output indication circuit to indicate logic "1" and the light-emitting diode to indicate logic "0". The test results are recorded in Table 2.

 

 

4. Derivation of CD4518 logic function

According to the circuit test results (Table 2), the logic function of CD4518 is analyzed and derived.

The measured derivation results are as follows:

1. CD4518 contains two independent decimal counting units, each unit has two clock input terminals CP and EN, where CP is triggered by the rising edge and EN is triggered by the falling edge;

2. When EN is used as the clock input terminal, CP must be grounded; when CP is used as the clock input terminal, EN must be connected to the positive power supply.

3.1CR and 2CR are the reset terminals of the two counters (high level is valid);

4.1Q0~1Q3 and 2Q0~2Q3 are the four-bit output terminals of the counter.

The CD4518 logic function summary is shown in Table 3.

 

 

V. Conclusion

Through the production and testing of the CD4518 logic function test circuit, students' learning initiative is greatly enhanced. Under the guidance of the teacher, they can use the single pulse generator to provide pulse signals to the circuit to explore new knowledge. The hands-on operation process of the students breaks through the teaching difficulties of this circuit. Students not only have a better understanding of the logical function of CD4518, but the circuit production and debugging process also improves students' technical application capabilities.

Keywords:CD4518 Reference address:Research on CD4518 logic function test circuit

Previous article:Design and implementation of radio frequency communication base station based on single chip microcomputer control
Next article:Integrated wind speed sensor

Latest Power Management Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号