CD4518 Cycle Timer Circuit

When the circuit is powered on, C2, R1 and C3, R3 generate a differential sharp pulse, which resets the counter CD4518 and the D-type flip-flop CD4013. At this time, the Q of the D-type flip-flop is high, the transistor is turned on, and the relay is energized.
The timer is composed of a 555 integrated circuit, resistors RA, RB, and capacitor C, which generate a 1-minute time base signal. After 1/2 CD4518 frequency division (10 frequency division), the falling edge of Q4A triggers the next frequency divider. At the same time, Q1A, Q2A, Q3A, and Q4A output BCD codes and send them to the CD4511 seven-segment decoder to drive the LED digital tube. When the counter receives the 100th pulse, Q1B, Q2B, Q3B, and Q4B (0101), the NAND gate CD4011 outputs a falling pulse, which becomes a rising pulse after being inverted by the inverter, triggering CD4013, causing the circuit to flip Q to a low level. The relay is released when the power is off, and the counter is naturally reset. The counter starts to count again, and the relay remains disconnected. The relay will only close when the counter counts 100 pulses. Therefore, this timer is powered on for 100 minutes, then off for 100 minutes, and repeats.
Because the time base signal here is 1 minute, the value displayed by the LED digital tube coincides with the delay time. If the time base signal is not an integer, the LED digital tube can only display the progress of the timing.