Design of digital electroplating power supply parallel current sharing system based on STM32F103

Publisher:DreamyMoonLatest update time:2014-05-07 Source: 互联网Keywords:STM32F103 Reading articles on mobile phones Scan QR code
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  In order to realize high-power digital electroplating power supply, this paper proposes a design scheme of digital electroplating power supply parallel current sharing system based on ARM chip STM32F103, and completes the software and hardware design of the system. The system uses STM32F103 as the main control chip, controls multiple power modules to work in parallel through CAN bus and averages their current to achieve the purpose of high power output. The system has multiple working modes and peripheral interfaces, and the human-machine interface is friendly. Practical application shows that the system works stably and meets the design requirements.

The STM32 series processor is an MCU  based on the ARM Cortex-M3 core produced by STMicroelectronics. It is specially designed for embedded applications such as microcontroller systems, automotive control systems, industrial control systems and wireless networks. It has the advantages of high performance, low power consumption, high integration, rich and outstanding on-chip peripherals, and low programming complexity. The digital electroplating power supply parallel current sharing system realizes the parallel operation of multiple power modules in the form of digital communication and control, provides greater output power, and has the advantages of flexible combination, high reliability, friendly human-machine interface, and diverse working modes. This paper uses the STM32F103VET6 processor as the main control chip to realize a digital electroplating power supply parallel current sharing system (hereinafter referred to as the "parallel current sharing system") with CAN bus as the communication medium, 5 working modes of voltage regulation/current regulation/ampere-hour/process curve/remote control, and LCD graphic display. The detailed design scheme of the main software and hardware of the system is given.

  1 Overall design

  The parallel current sharing system consists of a main control module and a power module, as shown in Figure 1. The main control module and the power module use the efficient and highly reliable CAN bus as the communication medium. The main control module completes human-machine interaction and the operation monitoring of the whole machine. Each power module is essentially a single power module, which works in a voltage-stabilized or current-stabilized manner according to the instructions of the main control module. In the current-stabilized working mode of the system, the main control module evenly distributes the set working current to each power module, and the power module controls the module to operate in a current-stabilized manner according to the distributed current, thereby achieving system current stabilization and current sharing. In the voltage-stabilized working mode of the system, the main control module designates one power module as the main module and the rest as slave modules. The main module works in a voltage-stabilized manner according to the voltage given by the main control module to achieve system voltage stabilization. At the same time, the main control module obtains the current of each power module, calculates the average current and distributes it to the slave module. The slave module works in a current-stabilized manner according to the average current to achieve system current sharing. On the basis of current-stabilized or voltage-stabilized work, the main control module counts the working ampere-hours in the ampere-hour mode, and performs drug addition control when the set ampere-hour is reached. In the process curve mode, the main control module control system works according to the set voltage or current steady working curve. In the remote control mode, the host computer completes the operation monitoring of the system by communicating with the main control module.

Figure 1 System overall structure diagram ( click to view larger image )

  2 System Hardware Design

  2.1 Main control chip STM32F103VET6

  The STM32F103VET6 belongs to the STM32F103 enhanced series processors, with more on-chip RAM and peripherals. The specific features are as follows:

  1) Adopts the 3-stage pipeline core Cortex-M3 based on Harvard architecture, with single-cycle multiplication and hardware division features, the highest operating frequency is 72 MHz, and the operation speed is up to 1.25DMips/MHz.

  2) Built-in high-speed memory, up to 512 k bytes of flash and 64 k bytes of SRAM.

  3) Up to 80 fast multifunctional bidirectional I/O ports, all of which can be mapped to 16 external interrupts; almost all ports can tolerate 5V signals.

  4) Up to 11 timers, including 4 16-bit general-purpose timers, 2 16-bit PWM advanced control timers with dead-zone control, 2 watchdog timers, system time timer, and 2 16-bit basic timers for driving DAC.

  5) Up to 13 communication interfaces, including 2 I2C interfaces, 5 USART interfaces, 3 SPI interfaces, CAN interface, USB2.0 full-speed interface, and SDIO interface.

  6) 3 12-bit A/D converters with 1μs conversion time (up to 21 input channels) and 2-channel 12-bit D/A converter.

  The excellent performance and rich resources of STM32F103VET6 make it almost unnecessary to expand the peripheral circuit to fully meet the design requirements, greatly simplifying the hardware design. The execution speed and memory capacity fully meet the multi-task real-time application of the main control module. As shown in Figure 1, the main control module design uses the CAN, USART, USB and other communication interfaces of STM32F103VET6. CAN is used to communicate with the power module, the two USARTs are used for micro printer and 485 communication (host computer communication), and USB is used for notebook on-site configuration of power system parameters. The LCD, buttons, LED indicators, buzzer and dosing switch in the human-machine interface of the main control module are all connected through GPIO, totaling 34.

  2.2 CAN communication module

  The CAN communication module is the most critical communication module in the system, which consists of a CAN controller, optocoupler isolation and a CAN bus driver (see Figure 1). The CAN controller is integrated in the STM32F103VET6 and fully supports CAN protocols 2.0A and 2.0B, with a baud rate of up to 1 Mbit/s. The controller integrates three priority-configurable send mailboxes, two 3-level-deep receive FIFOs, 14 variable-width filter groups and flexible interrupt management, which can efficiently complete a large amount of communication between the main control module and multiple power modules.

  The optocoupler isolation and CAN bus driver circuit is shown in Figure 2. CAN-TX and CAN-RX are the transmit data line and receive data line connected to the CAN controller. Due to the high output power of the system and strong electromagnetic interference, a high-speed optocoupler 6N137 is used to isolate the CAN controller from the CAN bus. MCP2551 is a fault-tolerant high-speed CAN bus driver that serves as the interface between the CAN controller and the physical bus.

Figure 2 Coupling isolation and CAN bus driver circuit ( click to see larger image )

  2.3 LCD Module

  LCD module is the main component of human-machine interface. LCD can be used to replace traditional digital tubes, so that graphical interactive interface can be applied to make human-machine interaction convenient and friendly. The system uses 240x128 graphic dot matrix STN liquid crystal module ZLG240128A. The module uses RA6963 controller and has a built-in 256-word ROM font generator. It can display English fonts, digital symbols and other letters, and supports up to 64 kByte of external display memory (Display RAM). It has text display mode, drawing display mode and mixed display mode. The LCD interface circuit is shown in Figure 3. The left LCD control and data lines are connected to 5 V tolerant GPIO. The operating voltage of the LCD module is 5 V, while the output voltage of STM32F103VET6 is 33 V. Therefore, 10 k resistors Rp1 and Rp2 are used as pull-up resistors, and the open drain mode of GPIO is used. Variable resistor VR1 is used for backlight brightness adjustment.

Figure 3 LCD interface circuit ( click to see larger image )

  3 System Software Design

  3.1 Overall software architecture

  The overall software architecture is shown in Figure 4. The underlying firmware library module is provided by ST, including all peripheral drivers and application interfaces of the STM32F103 series processors. The startup configuration module consists of the assembly file stm32f10x_startup.s, which completes the initialization of the stack and interrupt vector table. The hardware configuration module completes the initialization of on-chip peripherals such as reset and clock (RCC), interrupt controller, GPIO, watchdog, timer, etc. The interrupt service includes the interrupt service program of the system beat clock, watchdog, CAN transceiver, timer, and USART. The real-time operating system is used in the design to facilitate the coordinated operation of multiple tasks such as human-machine interface, communication, and control to ensure the real-time control. The human-machine interface module includes LCD driver, key scanning, graphical user interface, LED and buzzer driver to realize human-machine interaction. The working control module monitors the parallel operation of multiple power modules and realizes current sharing. The communication module completes the CAN communication required for monitoring the operation of the power module and the 485 communication during the remote control of the host computer. The timer module provides the timing function required for the operation of other modules.

Figure 4 Overall software architecture


  3.2 Work Control Module

  The working control module includes two parts: system initialization and operation control. System initialization determines the initial configuration of the parallel system by reading the rated parameters of the power module, counting the number of power modules, and calculating the total rated current of the system. Operation control monitors the parallel operation of the power modules in real time according to the user's specified method. The monitoring process is shown in Figure 5. First, set the voltage or current stabilization working mode and voltage or current parameters to the power module, and then send a start command to start the power module. Status query sends a query command in broadcast mode to query the operating status and parameters of each power module. Message reception receives the query response message sent by the power module and obtains data from the message; communication detection determines whether the communication is normal based on whether there is a response message. Data processing calculates system operating parameters such as total current, voltage, average current (voltage stabilization mode), ampere-hour (ampere-hour mode) based on the data obtained in the message reception. Fault handling detects power module and system faults, performs fault handling and alarms. Output processing outputs control parameters according to the current operating status, including soft start output, average current output in voltage stabilization mode, dosing signal output in ampere-hour mode, and voltage or current parameters of the next stage in process curve mode. The shutdown control controls the power module to stop working by sending a shutdown command when shutdown is required.

Figure 5 Operation monitoring flow chart

  4 Experimental Application

  The experimental system contains two 1 000 A/15 V power modules. The system operates in voltage regulation mode at the total set current, and the experimental results data in Table 1 are measured.

Table 1 Voltage regulation mode test results

  As can be seen from the table, the current imbalance is within 5%, which meets the relevant national standards and realizes the parallel operation and current sharing of power modules. Actual tests show that other relevant indicators of the system meet the requirements and the system operates stably and reliably.

  5 Conclusion

  The parallel current sharing system uses the ARM chip STM32F103 as the main control chip. By utilizing its rich resources and powerful performance, it realizes a variety of peripheral interfaces and simplifies the hardware design. It realizes a graphical interactive interface, task scheduling based on the operating system, CAN and host computer communication, and a variety of working modes, which enhances the functionality, friendliness and scalability of the system.

Keywords:STM32F103 Reference address:Design of digital electroplating power supply parallel current sharing system based on STM32F103

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