Impact of Miller Capacitance on IGBT Modules

You need to first understand the parasitic capacitance parameters of IGBT or IGBT module:

IGBT parasitic capacitance is an inherent characteristic of the internal structure of the chip. The chip structure and simple schematic diagram are shown in the figure below. Input capacitance Cies and feedback capacitance Cres are the fundamental elements to measure the gate drive circuit. Output capacitance Coss limits the dv/dt of the switching process. The loss caused by Coss can generally be ignored.

Where: Cies = CGE + CGC: Input capacitance (output shorted) Coss = CGC + CEC: Output capacitance (input shorted) Cres = CGC: Feedback capacitance (Miller capacitance) Dynamic capacitance decreases as the collector-to-emitter voltage increases, as shown in the figure below.

It can be seen that the Miller capacitor has a relatively large value when the VCE voltage is small. At this time, the transient change of VCE will have a significant impact on the IGBT gate through this capacitor, especially in the half-bridge circuit, which may cause parasitic conduction. More attention should be paid. In actual selection, the smaller the ratio of CCE to Cies, the better.