A new design of single-phase dual-Buck photovoltaic inverter

As a non-polluting energy source, the research on the utilization of solar energy has always been a hot topic. In order to improve the efficiency of solar energy conversion, the research on photovoltaic grid-connected inverters is the focus of photovoltaic utilization. For photovoltaic grid-connected inverters, their topological structures can be divided into the following according to the transformer:

High-frequency transformer type, industrial frequency transformer type and transformerless type. High-frequency transformers are small in size, light in weight, and highly efficient, but the control is relatively complex; industrial frequency transformers are large in size, heavy in weight, and simple in structure; in order to improve the efficiency of photovoltaic grid-connected systems and reduce costs, transformerless topology can be used when there are no special requirements. However, since there is no transformer, there is no electrical isolation between the input and output, and the parasitic capacitance of the photovoltaic array formed by the series and parallel connection of photovoltaic modules to the ground becomes larger, and the capacitance is greatly affected by the external environment, and the resulting common-mode current will be very large. For the study of leakage current, there are now a variety of solutions: when the full-bridge inverter adopts unipolar modulation, there is a common-mode voltage with a switching frequency pulsation, and when the bipolar modulation method is adopted, the common-mode voltage remains unchanged, and its amplitude is equal to half of the bus voltage; in the half-bridge inverter, the parasitic capacitance voltage to the ground is also clamped at half of the bus voltage by the input voltage divider capacitor, and remains basically unchanged. These are all methods based on bridge circuits to solve leakage current. In recent years, a dual-Buck inverter structure has emerged. This inverter has outstanding features such as no bridge arm direct pass, body diode non-operation, and bipolar operation, so it is widely used. This paper proposes a new three-level dual-Buck inverter solution and sets the corresponding control strategy to achieve maximum power point tracking and grid-connected control.

Overall solution of three-level dual-Buck inverter

As shown in Figure 1, it is the circuit topology diagram of the dual Buck inverter. The dual Buck inverter adopts a half-cycle working mode. When the output current is in the positive half cycle, the power tube S1, the freewheeling diode D1, the filter inductor L1 and the filter capacitor Cf together constitute the Buck1 circuit. When the output current is in the negative half cycle, the power tube S2, the freewheeling diode D2, the filter inductor L2 and the filter capacitor Cf together constitute the Buck2 circuit, and the two Buck circuits do not work at the same time. Compared with the traditional bridge inverter circuit, the circuit has no possibility of direct connection of the bridge arm, and the body diode does not need to participate in the working process. However, in this case, the voltage that the power tubes S1 and S2 bear in the half cycle of operation is twice the DC bus voltage Ud. Since the voltage waveform output by the bridge arm itself is still bipolar, its harmonic content is still very large.

By optimizing the dual-Buck inverter topology, the power tubes on the original bridge arms are replaced by a combination switch circuit of two power tubes and fast recovery diodes (i.e., S1&S3&D3 and S4&S2&D4), thus obtaining a novel three-level dual-Buck inverter topology as shown in FIG2.

This new three-level dual-Buck inverter is based on a half-cycle working mode: when the output inductor current iL is in the positive half cycle, the Buck1 circuit works, and when the inductor current is in the negative half cycle, the Buck2 circuit works. Its specific working mode is shown in Table 1. The optimized three-level dual-Buck inverter has zero leakage current because its parasitic capacitance voltage to ground is limited to half of the input voltage.

Control strategy analysis

In order to achieve maximum power point tracking and output voltage and current control, the entire control adopts a composite control strategy, including a voltage control loop, a current control loop and a current reference loop as shown in Figure 3.

The specific working process is as follows: by collecting the voltage UC1 on capacitor C1, half of the bus voltage is calculated to obtain UZ=Ubus/2; the difference between UC1 and Uz is calculated respectively, and the difference is input into the regulator of the voltage equalization loop, and the control current change △i is output; the bus voltage obtains the grid reference current ig through the maximum tracking link, and the reference current iL is subtracted from the control current change △i and the grid current ig, and the final current is passed through the proportional integral error amplifier circuit, intersected with the triangle wave and generated through the control logic. The first pulse width modulation signal (SPWM wave) is controlled by the output SPWM waveform to turn on and off the switch tube to realize the voltage regulation function. In the formula, c1 U and c2 U are the initial voltages of capacitors C1 and C2. Assuming that the voltages of the two capacitors are equal, the deviation of the voltages of the two capacitors is:

Simulation and Verification

For the above closed-loop system, set parameters and perform simulation. The specific parameter settings are as follows: input DC voltage Ud=720V, input capacitance C1=C2=1100uF, output filter inductance L1=L2=750uH, expected output AC voltage Uo=220V, frequency 50Hz, rated output power Po=1KW.

The specific simulation results are shown in Figure 4, where ug represents the grid voltage, iL represents the inductor current, Uc1 represents the voltage of capacitor C1, UC2 represents the voltage of capacitor C2, and V1~V4 represent the control signals of the inverter for the power switch tubes S1~S4. Specific working conditions: when iL is greater than zero, that is, it works in the positive half cycle, the Buck1 circuit works, the power switch tubes S1 and S3 are turned on, S2 and S4 are turned off, iL2=0, and the voltage uB=ug at this time; when iL is less than zero, that is, it works in the negative half cycle, the Buck2 circuit works, the power switch tubes S1 and S3 are turned off, S2 and S4 are turned on, iL2=0, and the voltage uA=ug at this time. This closed-loop system collects capacitor signals to realize input voltage control, so the input capacitors UC1 and UC2 remain stable.

Summarize

This paper analyzes the topological structure of the traditional bridge inverter circuit and the new three-level dual-Buck inverter circuit, analyzes the generation of leakage current in the ordinary dual-Buck inverter circuit, and proposes a new single-phase dual-Buck photovoltaic inverter solution. This improved three-level dual-Buck inverter circuit clamps the voltage of the parasitic capacitance between the inverter bridge arm and the ground through the voltage divider capacitor, and suppresses the leakage current for the low-frequency change of the grid frequency. A corresponding control strategy is formulated for the new three-level dual-Buck inverter circuit, and the maximum power tracking and voltage balancing control are achieved by sampling the voltage signal. Finally, the correctness of the three-level dual-Buck inverter circuit is verified by simulating the waveform, and good experimental results are obtained.