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Analysis of mosFET switching losses [Copy link]

 

Simplified model of MOSFET :

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I saw the latter and forgot the former.   Details Published on 2019-9-27 18:31
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It is important to note that the parasitic capacitance between the drain, source, and gate of the MOSFET, Cgd, Cds, and Cgs, these tiny capacitances are important factors in improving switching efficiency, especially at very high switching frequencies.

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When the channel is fully open, the channel resistance (RDS(ON)) is minimized; if the gate voltage is reduced, the channel resistance increases until almost no current passes through the drain and source, and the MOSFET is in the off state. It can be predicted that the larger the channel volume, the smaller the on-resistance.

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At the same time, a larger channel also requires a larger control gate. Since the gate is similar to a capacitor, a larger gate has a larger capacitance, which requires more charge to switch the MOSFET. At the same time, a larger channel also requires more time for the MOSFET to turn on or off. When working at high switching frequencies, these characteristics have a significant impact on the reduction of conversion efficiency.

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At low switching frequencies or low powers, the power loss of SMPS MOSFETs is determined by RDS(ON), and the influence of other non-ideal parameters is usually small and negligible. At high switching frequencies, these dynamic characteristics will receive more attention because they are the main cause of switching losses in this case.

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The first stage of the conduction conversion process:

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Charging the gate capacitance consumes a certain amount of power, which is usually dissipated to ground when the MOSFET is turned off. Thus, in addition to the power consumed in the MOSFET on-resistance, each switching cycle of the SMPS consumes power. Obviously, the number of times the gate capacitance is charged and discharged in a given time increases with the switching frequency, and the power consumption also increases accordingly. At very high switching frequencies, the switching losses exceed the losses in the MOSFET on-resistance.

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The turning on and off of MOSFET requires a certain transition time to charge the channel to generate current or discharge the channel to turn off the current.

In MOSFET parameter tables, these parameters are called turn-on rise time and turn-off fall time.

The turn-on and turn-off times of low on-resistance MOSFETs are relatively long.

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When the MOSFET is turned on and off, the channel is simultaneously charged with the drain-to-source voltage and the on-current, the product of which equals the power loss. The three basic powers are:
P = I*E
P = I2*R
P = E2/R

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By integrating the above formula to get the power consumption, the power loss under different switching frequencies can be evaluated.
The time for turning on and off the MOSFET is constant. When the duty cycle remains unchanged and the switching frequency increases, the time for state transition increases accordingly, resulting in an increase in total power consumption.

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For example, operating at 50% duty cycle 500kHz, if the turn-on time and turn-off time are 0.1MS each, then the turn-on time and turn-off time are 0.4MS each.

If the switching frequency is increased to 1MHz, the turn-on time and turn-off time are still 0.1MS, and the on time and off time are 0.15MS. In this way, the time used for state conversion is longer than the actual on and off time.

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The first-order approximation can be used to better estimate the power consumption of the MOSFET. The first-order approximation formula for the charging and discharging power consumption of the MOSFET gate is:
  EGATE = QGATE×VGS,
QGATE is the gate charge and VGS is the gate-source voltage.

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In the converter, the power consumption from turn-on to turn-off and from turn-off to turn-on can be approximated as:
  ET = (abs[VOUT - VIN]×ISW×t)/2
  where ISW is the average current through the MOSFET (typical value is 0.5IPK) and t is the turn-on and turn-off time given in the MOSFET parameter table.

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Awesome! It's the end of the month and I'm fighting for work points again. Haha. It won't be that hard to post it after I've integrated it. Forget it. I'm going to go back to work.

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PowerAnts posted on 2019-9-26 10:16 Awesome, it's the end of the month, and the fight for work points has started again, haha. It doesn't seem so hard to integrate it and post it again, forget it, I'm going to move bricks

No, I've been busy this month and have less time to come here. My posting style has always been the same, so just keep it up.

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I'm not looking for tea anymore. I deleted several posts yesterday.

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PowerAnts posted on 2019-9-27 10:28 I won’t look for tea anymore. I deleted several posts yesterday

It’s good to find faults. The more faults you find, the more people who read them will learn. Isn’t this the result you want?

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This post was last edited by china138 on 2019-9-27 18:17

It is better to integrate them. After integration, they will not be disturbed by hot spots, etc., and it will not be so tiring to look at. Otherwise, you have to copy them to Word to study.

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Weilin Power Supply published on 2019-9-27 17:50 Finding faults is good. The more you find, the more people will learn. Isn’t this the result you want?

Never mind. I don't have the time.

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china138 posted on 2019-9-27 18:14 It is better to integrate them. After integration, they will not be disturbed by those hot spots, etc., and it will not look so tiring. Otherwise, you have to copy them to Word to study by yourself

I saw the latter and forgot the former.

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