High-speed PCB controllability and electromagnetic compatibility design

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Chapter 1 PCB Layout

In PCB design, wiring is an important step to complete product design. It can be said that all the previous preparations are done for it. In the entire PCB, the design process of wiring is the most demanding, with the most delicate skills and the largest workload. PCB wiring includes single-sided wiring, double-sided wiring and multi-layer wiring. There are also two ways of wiring: automatic wiring and interactive wiring. Before automatic wiring, you can use interactive wiring to pre-wire the lines with stricter requirements. The edge lines of the input and output terminals should avoid being adjacent and parallel to avoid reflection interference. Ground wire isolation should be added when necessary. The wiring of two adjacent layers should be perpendicular to each other. Parallel wiring is prone to parasitic coupling.

The routing rate of automatic routing depends on a good layout. The routing rules can be preset, including the number of bends, the number of vias, the number of steps, etc. Generally, exploratory routing is performed first to quickly connect short lines, and then maze routing is performed. The global routing path optimization is first performed on the connection to be routed. It can disconnect the routed lines as needed. And try to re-route to improve the overall effect.

The through hole is not suitable for the current high-density PCB design, which wastes a lot of precious wiring channels. To solve this contradiction, blind and buried vias have emerged. They not only complete the role of through holes, but also save a lot of wiring channels to make the wiring process more convenient, smoother and more complete. The design process of PCB board is a complex and simple process. To master it well, it requires the majority of electronic engineering designers to experience it themselves to get the true meaning.

1. Processing of power supply and ground wire

Even if the wiring in the entire PCB board is completed well, the interference caused by the lack of consideration of the power supply and ground wires will reduce the performance of the product and sometimes even affect the success rate of the product. Therefore, the wiring of the power and ground wires should be taken seriously to minimize the noise interference generated by the power and ground wires to ensure the quality of the product.

Every engineer who designs electronic products knows the cause of noise between the ground wire and the power line. Now we will only explain how to reduce and suppress noise:

(1) It is well known that decoupling capacitors are added between the power supply and the ground line .

(2) Try to widen the width of the power and ground wires. It is best if the ground wire is wider than the power wire. The relationship between them is: ground wire > power wire > signal wire. Usually the signal wire width is: 0.2-0.3mm, the thinnest width can reach 0.05-0.07mm, and the power wire is 1.2-2.5mm. For digital circuits, the PCB can use a wide ground wire to form a loop, that is, to form a ground network (the ground of analog circuits cannot be used in this way)

(3) Use a large copper layer as the ground wire, and connect all unused areas on the printed circuit board to the ground as the ground wire. Or make a multi-layer board, with the power supply and ground wire occupying one layer each.

2 Common ground processing for digital and analog circuits

Now many PCBs are no longer single-function circuits (digital or analog circuits), but are a mixture of digital circuits and analog circuits. Therefore, when wiring, it is necessary to consider the mutual interference between them, especially the noise interference on the ground line.
The frequency of digital circuits is high, and the sensitivity of analog circuits is strong. For signal lines, high-frequency signal lines should be as far away from sensitive analog circuit devices as possible. For ground lines, the entire PCB has only one node to the outside world, so the problem of digital and analog common ground must be handled inside the PCB. In fact, the digital ground and analog ground are separated inside the board. They are not connected to each other, but at the interface where the PCB is connected to the outside world (such as plugs, etc.). There is a short circuit between the digital ground and the analog ground. Please note that there is only one connection point. There are also non-common grounds on the PCB, which is determined by the system design.

3. Signal lines are laid on the power (ground) layer. When wiring a multi-layer printed circuit board , there are not many lines left in the signal line layer. Adding more layers will cause waste and increase the workload of production. The cost will also increase accordingly. To solve this contradiction, you can consider wiring on the power (ground) layer. First, consider using the power layer, and then the ground layer. Because it is best to preserve the integrity of the ground layer.

4 Treatment of connecting legs in large area conductors

In large-area grounding (electricity), the legs of common components are connected to it. The treatment of the connection legs needs to be comprehensively considered. In terms of electrical performance, it is better for the pads of the component legs to be fully connected to the copper surface, but there are some hidden dangers in the welding and assembly of components, such as: ① Welding requires a high-power heater. ② It is easy to cause cold solder joints. Therefore, taking into account both electrical performance and process requirements, a cross-shaped pad is made, which is called heat shield, commonly known as thermal pad. In this way, the possibility of cold solder joints caused by excessive heat dissipation in the cross section during welding can be greatly reduced. The treatment of the legs of the power (ground) layer of the multilayer board is the same.

5 The role of network system in wiring

In many CAD systems, wiring is determined by the network system. If the grid is too dense, the number of paths will increase, but the step size will be too small, and the amount of data in the drawing field will be too large, which will inevitably place higher requirements on the storage space of the equipment, and will also have a great impact on the computing speed of computer-related electronic products. Some paths are invalid, such as those occupied by the pads of the component legs or by the mounting holes and fixed holes. If the grid is too sparse, too few paths will have a great impact on the wiring rate. Therefore, a grid system with reasonable density is required to support the wiring process.

The distance between the legs of a standard component is 0.1 inch (2.54 mm), so the basis of the grid system is generally set at 0.1 inch (2.54 mm) or an integer multiple of less than 0.1 inch, such as 0.05 inch, 0.025 inch, 0.02 inch, etc.

6 Design Rule Check (DRC)

After the wiring design is completed, it is necessary to carefully check whether the wiring design conforms to the rules set by the designer. At the same time, it is also necessary to confirm whether the rules set meet the requirements of the printed circuit board production process. The general inspection includes the following aspects:

(1) Whether the distance between wires, wires and component pads, wires and through holes, component pads and through holes, and through holes and through holes is reasonable and meets production requirements.

(2) Are the widths of the power and ground lines appropriate? Are the power and ground lines tightly coupled (low wave impedance)? Is there any place in the PCB where the ground line can be widened?

(3) Have the best measures been taken for key signal lines, such as minimizing the length, adding protection lines, and clearly separating the input and output lines?

(4) Do the analog circuit and digital circuit have their own independent ground lines?

(5) Whether graphics added to the PCB later (such as icons, annotations) will cause signal short circuits.

(6) Modify some undesirable lines.

(7) Are there any process lines on the PCB? Does the solder mask meet the requirements of the production process? Is the solder mask size appropriate? Is the character logo pressed on the device pad to avoid affecting the quality of the electrical equipment?

(8) Whether the outer frame edge of the power ground layer in the multilayer board is reduced. If the copper foil of the power ground layer is exposed outside the board, it is easy to cause a short circuit.

Part 2 PCB Layout

Layout is an important part in design. The quality of layout will directly affect the effect of wiring, so it can be said that reasonable layout is the first step to successful PCB design.

There are two layout methods, one is interactive layout and the other is automatic layout. Generally, the interactive layout is used to adjust the automatic layout. During the layout, the gate circuits can be redistributed according to the routing conditions, and the two gate circuits can be exchanged to make it the best layout for easy wiring. After the layout is completed, the design files and related information can be returned and annotated on the schematic diagram, so that the relevant information in the PCB board is consistent with the schematic diagram, so that the files can be created and the design can be changed in sync in the future. At the same time, the relevant information of the simulation is updated, so that the electrical performance and function of the circuit can be verified at the board level.

--Consider the overall aesthetics

The success of a product depends on both its intrinsic quality and its overall aesthetics. Only when both are perfect can the product be considered successful.

On a PCB board, the layout of components must be balanced, dense and orderly, and not top-heavy or one-sided.

--Layout check

Does the size of the printed board match the size of the processing drawing? Can it meet the PCB manufacturing process requirements? Are there any positioning marks?

Are there any conflicts between components in two-dimensional or three-dimensional space?

Are the components arranged in an orderly and orderly manner? Are all components arranged in an orderly manner?

Can components that need to be replaced frequently be easily replaced? Is it easy to insert the plug-in board into the device?

Is there an appropriate distance between the thermistor and the heating element?

Is it easy to adjust adjustable components?

Are radiators installed where heat dissipation is needed? Is the air flow smooth?

Is the signal flow smooth and interconnections minimal?

Are plugs, sockets, etc. inconsistent with mechanical design?

Have you considered the line interference issue?

Part 3 High-Speed ​​PCB Design

1. Challenges faced by electronic system design

With the massive increase in system design complexity and integration, electronic system designers are working on circuit designs above 100 MHz, and the operating frequency of the bus has reached or exceeded 50 MHz, and some even exceed 100 MHz. Currently, about 50% of the designs have clock frequencies exceeding 50 MHz, and nearly 20% of the designs have main frequencies exceeding 120 MHz.

When the system operates at 50MHz, transmission line effects and signal integrity problems will occur; and when the system clock reaches 120MHz, the PCB designed based on traditional methods will not work unless high-speed circuit design knowledge is used. Therefore, high-speed circuit design technology has become a design method that electronic system designers must adopt. Only by using the design technology of high-speed circuit designers can the controllability of the design process be achieved.

2. What is a high-speed circuit?

It is generally believed that if the frequency of a digital logic circuit reaches or exceeds 45MHZ~50MHZ, and the circuit operating at this frequency has accounted for a certain proportion of the entire electronic system (for example, 1/3), it is called a high-speed circuit.
In fact, the harmonic frequency of the signal edge is higher than the frequency of the signal itself. It is the rising and falling edges of the signal that change rapidly (or the signal jump) that trigger the unexpected results of signal transmission. Therefore, it is usually agreed that if the line propagation delay is greater than 1/2 of the rise time of the digital signal driver, such a signal is considered to be a high-speed signal and produces a transmission line effect.

The transmission of the signal occurs at the moment when the signal state changes, such as the rise or fall time. The signal travels from the driver to the receiver over a fixed period of time. If the transmission time is less than 1/2 of the rise or fall time, the reflected signal from the receiver will reach the driver before the signal changes state. Conversely, the reflected signal will reach the driver after the signal changes state. If the reflected signal is strong, the superimposed waveform may change the logic state.

(III) Determination of high-speed signals

We have defined the prerequisites for the transmission line effect to occur above, but how do we know whether the line delay is greater than 1/2 of the signal rise time at the driver? Generally, the typical value of the signal rise time can be given in the device manual, while the signal propagation time is determined by the actual wiring length in PCB design. The following figure shows the corresponding relationship between the signal rise time and the allowable wiring length (delay).

The delay per unit inch on the PCB is 0.167ns. However, if there are many vias, many device pins, and many constraints set on the network line, the delay will increase. Usually the signal rise time of high-speed logic devices is about 0.2ns. If there is a GaAs chip on the board , the maximum wiring length is 7.62mm.

Let Tr be the signal rise time and Tpd be the signal line propagation delay. If Tr≥4Tpd, the signal falls in the safe area. If 2Tpd≥Tr≥4Tpd, the signal falls in the uncertain area. If Tr≤2Tpd, the signal falls in the problem area. For signals that fall in the uncertain area and the problem area, high-speed wiring methods should be used.

4. What is a transmission line?

The traces on the PCB board can be equivalent to the series and parallel capacitors , resistors and inductors shown in the figure below . The typical value of the series resistor is 0.25-0.55 ohms/foot, and the parallel resistor is usually very high because of the insulation layer. After adding the parasitic resistance, capacitance and inductance to the actual PCB connection, the final impedance on the connection is called the characteristic impedance Zo. The wider the wire diameter, the closer to the power supply /ground, or the higher the dielectric constant of the isolation layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiving end do not match, the output current signal and the final stable state of the signal will be different, which will cause the signal to be reflected at the receiving end. This reflected signal will be transmitted back to the signal transmitting end and reflected back again. As the energy decreases, the amplitude of the reflected signal will decrease until the voltage and current of the signal reach a stable state. This effect is called oscillation, and the oscillation of the signal is often seen on the rising and falling edges of the signal.

5. Transmission Line Effect

Based on the transmission line model defined above, in summary, the transmission line will have the following effects on the entire circuit design.

• Reflected signals

• Delay & Timing errors

• False Switching

• Overshoot/Undershoot

• Induced Noise (or crosstalk)

• EMI radiation

5.1 Reflected Signals
If a trace is not terminated correctly (terminal matching), the signal pulse from the driver end is reflected at the receiver end, causing unexpected effects and distorting the signal profile. When the distortion is very significant, it can lead to multiple errors and cause design failure. At the same time, the distorted signal is more sensitive to noise, which can also cause design failure. If the above situation is not taken into consideration, EMI will increase significantly, which will not only affect the design results itself, but also cause the failure of the entire system.

The main reasons for the generation of reflected signals are: too long routing; unterminated transmission lines, excessive capacitance or inductance, and impedance mismatch.

5.2 Delays and Timing Errors

Signal delay and timing errors are manifested as a signal that does not jump for a period of time when changing between the high and low thresholds of the logic level. Excessive signal delay may cause timing errors and confusion of device functions.
Problems usually occur when there are multiple receiving ends. Circuit designers must determine the worst-case time delay to ensure the correctness of the design. Causes of signal delay: driver overload, long routing.

5.3 Multiple logic level threshold crossing errors

The signal may cross the logic level threshold multiple times during the transition process, resulting in this type of error. Multiple crossing of the logic level threshold error is a special form of signal oscillation, that is, the oscillation of the signal occurs near the logic level threshold. Multiple crossing of the logic level threshold will cause logic function disorder. The causes of reflected signals: too long routing, unterminated transmission lines, excessive capacitance or inductance, and impedance mismatch.

5.4 Overshoot and Undershoot

Overshoot and undershoot come from two reasons: the trace is too long or the signal changes too fast. Although most components have input protection diodes at the receiving end , sometimes these overshoot levels will far exceed the component power supply voltage range and damage the components.

5.5 Crosstalk

Crosstalk occurs when a signal passes through a signal line, and a related signal is sensed on the adjacent signal line on the PCB board. We call this crosstalk.

The closer the signal line is to the ground line and the larger the line spacing is, the smaller the crosstalk signal will be. Asynchronous signals and clock signals are more likely to generate crosstalk. Therefore, the way to resolve crosstalk is to remove the signal that causes crosstalk or shield the signal that is severely interfered.

5.6 Electromagnetic Radiation

EMI (Electro-Magnetic Interference) is electromagnetic interference. The problems it causes include excessive electromagnetic radiation and sensitivity to electromagnetic radiation. EMI manifests itself as the radiation of electromagnetic waves to the surrounding environment when the digital system is powered on, thereby interfering with the normal operation of electronic equipment in the surrounding environment. The main reasons for its occurrence are that the circuit operating frequency is too high and the layout and wiring are unreasonable. At present, there are software tools for EMI simulation, but EMI simulators are very expensive, and it is difficult to set simulation parameters and boundary conditions, which will directly affect the accuracy and practicality of the simulation results. The most common practice is to apply various design rules for controlling EMI to every link of the design, and realize rule-driven and control in every link of the design.

6. Methods to avoid transmission line effects

In view of the influences introduced by the above-mentioned transmission line problems, we discuss the methods of controlling these influences from the following aspects.

6.1 Strictly control the routing length of key network cables
If there are high-speed transition edges in the design, the transmission line effect on the PCB must be considered. The high-clock frequency fast integrated circuit chips that are commonly used now have such problems. There are some basic principles to solve this problem: If C MOS or TTL circuits are used for design, the wiring length should not exceed 7 inches when the operating frequency is less than 10MHz. The wiring length should not exceed 1.5 inches when the operating frequency is 50MHz. If the operating frequency reaches or exceeds 75MHz, the wiring length should be 1 inch. For GaAs chips, the maximum wiring length should be 0.3 inches. If this standard is exceeded, there will be a transmission line problem.

6.2 Reasonable planning of routing topology

Another way to solve the transmission line effect is to choose the correct routing path and terminal topology. The routing topology refers to the routing sequence and routing structure of a network cable. When using high-speed logic devices, unless the routing branch length is kept very short, the signal with fast edge changes will be distorted by the branch routing on the signal trunk routing. Under normal circumstances, PCB routing adopts two basic topologies, namely daisy chain routing and star distribution.

For daisy chain wiring, the wiring starts from the driver end and reaches each receiving end in turn. If a series resistor is used to change the signal characteristics, the position of the series resistor should be close to the driver end. Daisy chain wiring is the best in controlling the high-order harmonic interference of the wiring. However, this wiring method has the lowest routing rate and is not easy to be 100% routed. In actual design, we make the branch length in daisy chain wiring as short as possible. The safe length value should be: Stub Delay <= Trt *0.1.

For example, the length of the branch end in a high-speed TTL circuit should be less than 1.5 inches. This topology occupies less wiring space and can be terminated with a single resistor. However, this routing structure makes the reception of signals at different signal receiving ends asynchronous.

The star topology can effectively avoid the problem of clock signal asynchrony, but it is very difficult to complete the wiring manually on a high-density PCB board. Using an automatic router is the best way to complete star wiring. Each branch requires a terminal resistor. The resistance of the terminal resistor should match the characteristic impedance of the connection. This can be calculated manually or by using CAD tools to calculate the characteristic impedance value and the terminal matching resistance value.

In the two examples above, simple terminal resistors are used. In practice, more complex matching terminals can be used. The first option is RC matching terminals. RC matching terminals can reduce power consumption, but can only be used when the signal is relatively stable. This method is most suitable for matching clock line signals. The disadvantage is that the capacitor in the RC matching terminal may affect the shape and propagation speed of the signal.

The series resistor matching terminal does not generate additional power consumption, but it will slow down the transmission of the signal. This method is used in bus driving circuits where time delay has little impact. The advantage of the series resistor matching terminal is that it can reduce the number of components used on the board and the connection density.

The last method is to separate the matching terminal. In this method, the matching element needs to be placed near the receiving end. Its advantage is that it will not pull down the signal and can avoid noise well. It is typically used for TTL input signals (ACT, HCT, FAST).

In addition, the package type and installation type of the terminal matching resistor must also be considered. Generally, SMD surface mount resistors have lower inductance than through-hole components, so SMD package components are the first choice. If you choose ordinary through-hole resistors, there are also two installation methods to choose from: vertical and horizontal.

In the vertical mounting method, one of the mounting pins of the resistor is very short, which can reduce the thermal resistance between the resistor and the circuit board, making it easier for the heat of the resistor to dissipate into the air. However, a longer vertical mounting will increase the inductance of the resistor. The horizontal mounting method has a lower inductance due to the lower mounting. However, the overheated resistor will drift, and in the worst case, the resistor will become an open circuit, causing the PCB trace termination matching failure, which becomes a potential failure factor.

6.3 Methods of Suppressing Electromagnetic Interference

Solving the signal integrity problem well will improve the electromagnetic compatibility (EMC) of the PCB board. It is very important to ensure that the PCB board has a good grounding. For complex designs, it is very effective to use a signal layer with a ground layer. In addition, minimizing the density of the outermost signal of the circuit board is also a good way to reduce electromagnetic radiation. This method can be achieved by using the "surface layering" technology "Build-up" design to make PCBs. Surface layering is achieved by adding a thin insulating layer and a combination of micro-holes for penetrating these layers to the ordinary process PCB. The resistors and capacitors can be buried under the surface layer, and the trace density per unit area will increase by nearly one-fold, thereby reducing the volume of the PCB. The reduction of PCB area has a huge impact on the topology of the trace, which means a smaller current loop and a smaller branch trace length, and the electromagnetic radiation is approximately proportional to the area of ​​the current loop; at the same time, the small volume feature means that high-density pin packaging devices can be used, which in turn reduces the connection length, thereby reducing the current loop and improving the electromagnetic compatibility characteristics.

6.4 Other technologies available

In order to reduce the instantaneous overshoot of the voltage on the power supply of the integrated circuit chip , decoupling capacitors should be added to the integrated circuit chip. This can effectively remove the impact of the burrs on the power supply and reduce the radiation of the power supply loop on the printed circuit board.

When the decoupling capacitor is connected directly to the power leg of the integrated circuit instead of to the power layer, the effect of smoothing the burr is the best. This is why some device sockets have decoupling capacitors, while some devices require the distance between the decoupling capacitor and the device to be small enough.

Any high-speed and high-power devices should be placed together as much as possible to reduce the instantaneous overshoot of the power supply voltage.

If there is no power layer, the long power connection will form a loop between the signal and the return path, becoming a radiation source and an inductive circuit.

The situation where the routing forms a loop that does not pass through the same network cable or other routings is called an open loop. If the loop passes through other routings of the same network cable, it forms a closed loop. Both situations will form an antenna effect (wire antenna and loop antenna). The antenna generates EMI radiation to the outside and is also a sensitive circuit itself. The closed loop is an issue that must be considered because the radiation it generates is approximately proportional to the closed loop area.

Conclusion

High-speed circuit design is a very complex design process. ZUKEN's high-speed circuit routing algorithm (Route Editor) and EMC/EMI analysis software (INCASES, Hot-Stage) are used to analyze and discover problems. The method described in this article is specifically aimed at solving these high-speed circuit design problems. In addition, there are multiple factors that need to be considered when designing high-speed circuits, and these factors are sometimes mutually exclusive. For example, when high-speed devices are laid out close together, although delays can be reduced, crosstalk and significant thermal effects may occur. Therefore, in the design, it is necessary to weigh various factors and make comprehensive compromises; both to meet design requirements and reduce design complexity. The use of high-speed PCB design methods constitutes the controllability of the design process. Only controllable ones are reliable and successful!

Reference address:High-speed PCB controllability and electromagnetic compatibility design

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