Tiny Digital Predistortion Receiver Integrates RF, Filters, and ADC

In a cellular base station, the power amplifier (PA) consumes more electrical power than any other component, making it a significant contributor to operating expenses for service providers. Complex digital modulation methods require extremely high linearity in the PA, so the PA must be driven well below the saturation region, where the PA is most efficient. To improve PA efficiency, designers use digital techniques to reduce the crest factor and improve the linearity of the PA, allowing the PA to operate closer to the saturation region. Digital predistortion (DPD) is the preferred PA linearization method. While much of the attention has been paid to the DPD algorithm, there is another key component, the RF feedback receiver.

Requirements for Digital Predistortion Receivers

The digital predistortion receiver converts the output of the PA from an RF signal back to a digital signal and is part of the feedback loop (see Figure 1). The key design requirements are the input frequency range and power level, the intermediate frequency, and the bandwidth to be digitized. Some of these requirements can be derived directly from the PA performance specifications, while others are optimized during design. The baseband transmit signal is upconverted to the carrier frequency and is limited to the frequency band specified by the air interface standards such as WCDMA, TD-SCDMA, CDMA2000, and LTE. Since the purpose of the DPD loop is to measure the PA transfer function, it is not necessary to separate the carrier frequency or demodulate the digital data. PA nonlinearities will produce odd-order intermodulation products that will form spectral regrowth in adjacent and alternate channels. The 3rd-order products appear within 3 times the desired channel bandwidth (see Figure 2). Similarly, the 5th-order and 7th-order products are within 5 and 7 times the desired channel bandwidth, respectively. Therefore, the DPD switch must achieve a multiple of the transmit bandwidth equal to the order of the intermodulation products being linearized.

Figure 1: Digital predistortion signal chain

Figure 2: Intermodulation products

The current trend is to mix the desired channel to an intermediate frequency (IF) and capture the full bandwidth of all intermodulation products. The IF should be carefully chosen to reduce the filtering burden and avoid other frequencies that have been determined by the specification requirements. Similarly, the sampling rate should be selected as a multiple of the digital modulation chip rate, for example, 3.84MHz in the case of WCDMA. Finally, Nyquist's theorem requires that the sampling rate must be at least twice the sampling bandwidth. Although many configurations are acceptable, here is a set of configurations that meet these constraints, with an IF of 184.32MHz, an ADC sampling rate of 245.76MHz, and a bandwidth of 122.88MHz.

In the case of a 20W PA, the average output power is 43dBm. The peak-to-average ratio (PAR) is about 15dBm. To set the average input power to the receive chain mixer to -15dBm, the insertion loss of the coupler and attenuator combined must be 58dB (see Figure 1). The WCDMA standard specifies a maximum in-band noise of -13dBm/MHz (-73dBm/Hz) for the PA. Therefore, the combination of the coupler and attenuator (-58dB) and the PA noise limit (-13dBm/MHz) requires that the receiver sensitivity must be less than -71dBm/MHz (-131dBm/Hz). To provide sufficient margin, a value of at least 6dB to 10dB better than this is required. This sets the frequency plan, power level, and sensitivity requirements for the digital predistortion receiver.

Integrated Digital Predistortion Receiver
Once the system requirements are determined, the circuit can be implemented using a mixer, IF amplifier, ADC, passive filtering, matching network, and power supply bypassing. Although calculations and simulations are useful, there is no substitute for evaluation on real hardware, which typically results in multiple iterations of the printed circuit board (PCB). However, a new class of integrated receivers based on Linear Technology's micromodule (µModule®) packaging technology has greatly simplified this task. The LTM®9003 Digital Predistortion µModule receiver is a fully integrated digital predistortion receiver, specifically completing the RF-to-digital signal conversion in a single device.

The LTM9003 consists of a high linearity active mixer, an IF amplifier, an LC bandpass filter, and a high speed ADC (see Figure 3). The wire-bonded bare die assembly ensures a very compact overall footprint, but still allows the reference and supply bypass capacitors to be placed closer to the die than is possible with conventional packaging. This reduces the potential for noise to degrade the ADC fidelity. This philosophy is applied to the high frequency layout techniques used throughout the LTM9003 receiver chain.

Figure 3: Integrated digital predistortion receiver LTM9003

This integration eliminates many of the challenges of driving high speed ADCs. Linear circuit analysis cannot possibly account for the current pulses generated by the ADC sample-and-hold switching action. Traditional circuit layout requires multiple iterations to determine an input network that absorbs these pulses, is absorbable out-of-band, and does not operate seamlessly with the preamplifier. The IF amplifier must also be able to drive this network without adding distortion. Overcoming these challenges is perhaps the most remarkable feature of the LTM9003 uModule receiver.

The passive bandpass filter is a 3rd order filter with an extremely flat passband. At the 25MHz center frequency of the band, the filter exhibits less than 0.1dB of ripple, and only 0.5dB of ripple over the entire 125MHz passband. This 3rd order configuration ensures that the shoulder of the frequency response is monotonic, which is important for many digital pre-distortion algorithms.

The overall performance of the LTM9003 greatly exceeds the system requirements described above. Single tone is -2.5dBm, which is equivalent to -1dBFS at the ADC, and the signal-to-noise ratio (SNR) is typically -145dBm/Hz. This figure is well below the target value of -131dBm/Hz required by the WCDMA standard. The worst-case harmonics are 60dBc. The IIP3 figure of 25.7dBm means that if the linearity of the PA is good enough, the LTM9003 can support an ACPR of 87dBc. The system requirements and functions when using even the best power amplifier are far exceeded by the LTM9003. The entire link consumes about 1.5W of power using 3.3V and 2.5V supplies, but only occupies 11.25mm x 15mm of board area.

Other Alternative Configurations
µModule technology also provides an unexpected flexibility. By adjusting the parameter values ​​of passive components or substituting multiple ICs optimized as a group, it is possible to provide specialized versions of the LTM9003 without sacrificing performance or adding complexity.

For example, the LTM9003-AA uses a low power, silicon germanium active mixer that operates from a 3.3V supply. The 2 × RF - 2 × LO components produce a 60dBc second harmonic, the worst spurious noise in the spectrum. Replacing the mixer with a similar 5V device can reduce this spurious noise at the expense of power consumption. In the LTM9003-AB, this second harmonic is reduced by 4dB. Similarly, replacing a 210Msps ADC that consumes less power can reduce the sampling rate, and the LC filter values ​​can be changed to achieve different filter bandwidths, but still achieve excellent passband flatness.

Small Package, Big Benefits
The benefits of using the LTM9003 for PA linearization are evident on several levels. At a high-level, digital predistortion allows the PA to run with less back-off. As a result, the PA is more efficient, so it consumes less power itself while delivering the same output power. At a board level, the micromodule package integrates all key components, including passive filters and decoupling components, into a very small area. This significantly saves board area, simplifies layout, and improves performance. This integration enables high-performance remote radio heads (RRHs).

From an engineering perspective, using the LTM9003 saves time. Filter design and component matching require PCB iterations to get the design right. Designing a filter that is not disturbed by the switching action of the ADC sample and hold circuit is particularly challenging. Even changing the power supply decoupling capacitors can affect overall performance and may require board layout revisions. Such tasks can take months of engineering time to debug each revised version and evaluate the changes introduced. Using the LTM9003 means that this work has already been done.

Conclusion
Although the digital algorithms for digital pre-distortion have received considerable attention, the analog receiver design requirements are also demanding. The LTM9003 uModule receiver simplifies this design by integrating the entire receiver in a single tiny package.

Figure 4: Mid-frequency response

Figure 5: 64k point two-tone FFT

Figure 6: FFT of 4-channel WCDMA input at 2.14Gz