Research on parallel PFC converter based on direct current control

1 Introduction

With the extensive application of power electronic devices, the problem of harmonic pollution in power systems is becoming increasingly serious. PFC technology and APF have been widely studied as effective means to suppress grid current harmonics.

The literature proposes a direct current control method for APF. The essence of this scheme is parallel PFC, which means combining the topology of parallel APF with the control strategy of PFC so that the waveform of the input current tracks the input sinusoidal voltage waveform to achieve unit PFC.

This paper analyzes the working principle of the parallel PFC converter based on direct current control in detail, proposes a voltage and current dual closed-loop control scheme in which the DC side of the converter is stabilized and the grid side current tracks the voltage waveform, and establishes a small signal model of the system. On this basis, the system parameters are optimized and designed to improve the compensation performance of the system, and the rationality of the parameter design is verified by a 1 kW, 20 kHz principle prototype.

2 Working principle and control scheme of parallel PFC

The basic topology of the single-phase parallel PFC converter is a single-phase full-bridge inverter, as shown in the dotted box 1 in Figure 1. The inverter is connected to the single-phase grid through the filter inductor L, and the DC side is connected to C. The capacitor voltage Udc can be regarded as constant within a switching cycle.

The inductor connected to the AC output side has two functions: 1. To ensure that the current is controllable, the AC side of the inverter is an equivalent voltage, and the parallel PFC output is a controlled current, so the inductor plays the role of controlling the conversion of the quantity; 2. As a first-order low-pass filter to filter out switching harmonics. The function of the DC side capacitor is to buffer the energy exchange between the DC side and the AC side of the inverter, stabilize the DC side voltage, and suppress the DC side harmonic voltage.

The dotted box 2 in Figure 1 is a harmonic source load, and its iL contains fundamental current and harmonic current. Let the active component of the fundamental current be iLf, and the sum of the reactive component of the fundamental current and the harmonic current be iLh. The control goal of the parallel PFC is to control the power supply current to track the power supply voltage waveform to achieve unit PFC. If the power supply current is is directly controlled to iLf, the current ic output by the inverter is iLh.

The parallel PFC system adopts voltage and current double closed-loop control, and the control block diagram is shown in Figure 2. The DC side voltage Udc of the sampling inverter bridge is compared with the reference value Uref and sent to the voltage controller, and the command current amplitude of the power supply current is output. The power supply voltage us is sampled to obtain a unit amplitude sinusoidal signal S with the same frequency and phase. S is multiplied with as the command signal of the power supply current, and compared with the actual current, it is used as a modulation signal after passing through the current controller, and the SPWM switch control signal is generated by intersecting with the triangle wave. The switch control strategy of the inverter adopts unipolar frequency multiplication SPWM technology.

3 Main circuit parameter design

3.1 DC side capacitor

The stability of the DC side voltage is an important factor to ensure that the PFC system has good compensation performance. Therefore, the need for DC side voltage stability is mainly considered during design.

The pulsation of the DC side voltage mainly comes from the energy pulsation caused by the harmonics and reactive components in the inverter compensation current, as well as the energy pulsation caused by the switching loss and AC inductor energy storage. Among them, the pulsation caused by the reactive current is the most obvious. The DC side capacitor is designed as follows:

Where: Us is the effective value of the power supply voltage; Iq is the effective value of the single bridge reactive current; δ is the allowable voltage pulsation ratio; ω is the grid angular frequency.

In order to ensure that the main circuit can track the current in real time, the power supply voltage peak value Usp≤MUdc should be satisfied, and M is the amplitude modulation ratio.

3.2 AC side inductance

The AC side inductor and its equivalent series resistance RESR form a low-pass filter. When designing, it should ensure that its passband is as far away from the switching frequency as possible to avoid interference from switching noise. First set the noise tolerance. Only harmonics less than the noise tolerance are considered not to interfere with the signal. Take the tolerance β=I(n)/I(1)=10%, where I(n) is the harmonic current amplitude and I(1) is the fundamental current amplitude.

Since the compensation current is generated by high-frequency switching, it contains a large amount of switching ripple. Considering the current ripple, let the maximum value of the harmonic current pulsation amplitude be △Imax, then the inductor should satisfy:
L≥Usp(Udc-Usp)／(fs△ImaxUdc) (4)
From the perspective of the compensation performance of the PFC system, the smaller the inductance, the wider the transmission bandwidth of the system and the faster the dynamic response speed; from the perspective of reducing the current ripple, the larger the inductance, the better. Therefore, both requirements should be taken into account, and the appropriate inductance value should be selected according to equations (3) and (4).

4 Control system parameter design

Figure 3 shows the block diagram of the parallel PFC system. For the fundamental wave, the inverter bridge containing the SPWM link can be equivalent to the proportional link K.

4.1 Design of the current inner
loop If integral regulation is added to the current loop, it will cause the harmonic phase to lag and affect the harmonic compensation effect of the main circuit. Therefore, the current loop adopts a P controller, as shown in Figure 4.

The open-loop transfer function of the inner loop is:
G(s)=PUref／(sLUcm) (5)
When Uref, L, and Ucm are all constants and the parameter P changes from zero to infinity, the root trajectory of the inner current loop will not cross the imaginary axis and enter the right half plane of s, so the system is stable for all P values. The larger the P, the faster the system responds, but if P is too large, it will affect its steady-state performance and cause oscillation.

4.2 Design of the voltage outer loop

Figure 5a shows the control block diagram of the voltage outer loop. The error between Uref and Udc is adjusted by PI, which is equivalent to introducing the fundamental active component, so that the grid and the main circuit exchange active energy.

The error after voltage loop PI adjustment is equivalent to the first-order integral link near the steady-state working point of DC side voltage. The closed-loop transfer function block diagram of DC side voltage control can be obtained, as shown in Figure 5b. Its closed-loop transfer function is:

Kp, K1 mainly consider the stability of the system when taking values. A large Kp value will distort the power supply current command signal, thereby distorting the actual current waveform. Therefore, the Kp value should not be large, and the smooth error adjustment signal is mainly obtained by integral adjustment to eliminate the system static error.

5 Experimental verification

The relevant parameters of the prototype are as follows: power supply voltage 220 V/50 Hz, DC side capacitor 2 200 μF, AC side inductor 1 mH, DC side voltage reference 400 V, switching frequency 20 kHz, and the load consists of linear load (cosφ=0.75) and nonlinear load (diode rectifier bridge inductor-capacitor filter load).

Figure 6 shows the experimental waveforms of power supply voltage us, compensated power supply current ic, load current iL, and inverter compensation current ic.

As can be seen from the figure, when the system carries loads of different natures, there is a phase difference between the power supply current and the power supply voltage before compensation, or the power supply current waveform itself is distorted, or both problems exist. After compensation, the power supply current is consistent with the power supply voltage phase and the power supply current is sinusoidal, which improves the input power factor.

Table 1 shows the comparison of experimental results under different load conditions. It can be seen that when the system is connected to an inductive load, the inverter introduces switching subharmonics, and the THD after compensation is greater than that before compensation, but within the allowable range; when other loads are connected, the THD after compensation is greatly reduced. The power factor λ after compensation is close to 1, which can achieve unity PFC.

6 Conclusion

This paper explains the working principle of parallel PFC, analyzes and designs the parameters of the main circuit and control circuit in detail, and conducts experimental research. The experimental results show that the parallel PFC system has good compensation effect and PFC performance.

The parallel PFC system with direct current control has the following advantages: ① Due to the use of direct current control, there is no need to detect and analyze harmonics and reactive currents, and the control circuit is simple; ② In the parallel structure, the PFC converter does not need to process all the power of AC/DC conversion, but only needs to process harmonics and reactive power, the device capacity is small, and the loss is low; ③ Due to the use of a parallel structure, multiple inverter bridges can be connected in parallel or cascaded, and a higher equivalent switching frequency can be achieved at a lower switching frequency through appropriate control strategies.