Reduce power consumption and thermal events in industrial applications

The focus of any new design, whether in industrial control or elsewhere, is making the system as efficient as possible. Improving system efficiency has several benefits. First, the overall system power budget is reduced with improved efficiency, which saves energy and reduces costs. Second, expensive thermal cooling systems are no longer as dependent. Finally, the power pressure is reduced, so system integration can be further increased. For many applications, this can be achieved through software, such as controlling system key events, planning process uptime and downtime, or shutting down non-critical components within the process. However, for most process control applications that require continuous monitoring of process variables, it is simply impossible for the system to enter a power saving mode. Other applications are too complex, and taking the system offline is expensive and time-consuming. Therefore, for these applications, saving power requires the use of efficient and intelligent integrated circuit devices to provide power only where and when it is needed.

PLC Overview

Figure 1 shows a typical industrial control system. Industrial control systems are used in industries such as machinery and factory control, as well as process control applications such as oil pressure, gas pressure detection, and liquid flow rate. Based on the information received from the remote site, the system automatically or by the operator pushes monitoring commands to the remote site control devices, also commonly referred to as field devices. These field devices control local operations such as opening and closing valves and circuit breakers, collecting data from sensor systems, and monitoring the local environment for alarm conditions. The PLC rack system shown here typically contains a power module, a processor module, and multiple analog I/O and digital I/O cards. Each analog or digital I/O card communicates with remote sensors and actuators, which may be in the form of digital or analog voltage and current.

Looking closely at analog I/O cards, you can see that inputs vary widely, from small signal inputs from sensors such as RTDs or thermocouples to analog current or voltage inputs such as 4-20mA or ±10V. Most of the time, voltage inputs have fairly high input impedance. Current inputs are typically terminated with relatively small sense resistors. Therefore, analog input cards tend to be quite efficient in terms of total system power consumption, typically consuming only 1W to 2W of total power. Analog outputs, however, present a completely different trend. Both current and voltage outputs are effectively driven into unknown loads, so module designers need to ensure that the outputs are also protected from fault conditions, such as short circuits or miswiring events. Designers need to both protect the IC and minimize the power consumption of the module. Depending on the number of channels in the card, power consumption can typically reach up to 10W.

The size of a typical I/O card that can be inserted into a PLC rack slot has been shrinking over the past 10 years. The 8-channel module currently in mass production is generally a 90 mm × 70 mm module with a height of about 23.5 mm. The industry trend will continue to be further reduced in size, which is actually a market-driven demand. At the same time, the channel density or number needs to be increased, which can not only improve the functionality of the module, but also increase price competitiveness. Obviously, for such modules of a given size, power consumption is becoming a key issue, and thermal cooling systems using air convection technology are not only expensive, space-consuming, but also not very energy-efficient. Therefore, it is necessary to consider other ways to solve the power consumption challenge.

Future Design Challenges

What challenges do these requirements bring to designers? First, increasing channel density while keeping the same space will significantly increase the ambient temperature of the module. This is different from the IC self-heating effect, but the latter is also important and needs to be considered during design. In some cases, system ambient temperatures as high as 100°C are not uncommon. This in itself poses a challenge to the maximum IC junction temperature. Increased channel density also means an increase in the number of components, so it is obvious that smaller components, lower quiescent current and higher efficiency are required. The extended temperature range also means that errors caused by temperature drift need to be considered, so low ppm reference voltage sources and low drift converters are urgently needed. From a power consumption perspective, many designers need to sacrifice design specifications to meet the power consumption budget. Although this is feasible, it will lead to a less competitive product.

Take a simple flow meter system in an industrial process control application as an example. In Figure 2, the flow meter monitors flow rate through a 4-20mA process variable, etc., and controls a positioner through a similar 4-20mA signal, which drives an actuator valve controller and ultimately controls the flow rate of liquid or gas in the system. The 4-20mA signal from the positioner needs to be terminated with a sense resistor and ultimately fed to an ADC. These sense resistors vary widely, ranging from 50Ω to 1KΩ. The need to support such a wide range of loads makes the design of 4-20mA systems more complex, especially how to deal with power consumption in normal mode (especially fault conditions). There are several ways to deal with power consumption, and a simple way is to add external components, such as a boost transistor to handle excessive power. While this method does help reduce the power consumption of semiconductor devices, it does not actually reduce the power consumption of the module itself.

A real-world example can illustrate some of the power dissipation factors. As mentioned above, these 4-20mA loops are terminated with a load resistor, which can be as high as 1KΩ. When driving 24mA into a 1KΩ load, the output voltage should be at least 24V to provide adequate compliance. This does not include any headroom in the driver device, or even take into account power supply regulation. Assuming the driver device has 2V headroom, the supply voltage can be as low as about 26V. To illustrate how this affects the internal die temperature, let's use the AD5422 device as an example. The AD5422 is a single channel, 16-bit DAC with programmable current and voltage output ranges suitable for industrial control applications.

Assuming the current output (e.g. 0mA to 24mA) is driven to a short circuit or no load, all the power is lost within the module. In this case, the total power consumption of the load alone is the 26V supply voltage multiplied by the 24mA full-scale output current, which is about 624mW. Since the IC device will feel all this power, the thermal effect of dissipating this power on the chip must be considered. So the first question is how to limit the self-heating of the device, and a common method to improve thermal protection is to add an exposed pad on the bottom of the chip.

Exposed Pad Technology

The exposed pad provides a low thermal resistance path to dissipate heat away from the PCB. This resistive path will carry most of the heat away from the device, thus effectively acting as a heat sink for the integrated circuit, as shown in Figure 3.

Figure 3 Influence of exposed pad and thermal vias

The land area itself is the copper layer on the component side of the PCB. The land area should be at least as large as the exposed pad, but can be larger depending on the free space from the exposed pad to the other pin land areas. Thermal vias conduct heat from the thermal land area to the ground plane and spread through the bottom of the PCB to the ambient temperature. Multiple vias improve IC heat dissipation while improving the electrical connection to ground. One thing to note is that the number of vias in a design depends on the power consumption and electrical requirements of the specific application. But there is a point of "diminishing benefits", as shown in the graph on the right side of this slide, after which adding thermal vias may not significantly improve the package performance. Using the LFCSP device here as an example, it is clear that if you increase the number of vias from 4 to 16, you can achieve a thermal resistance improvement of about 4°C/W. As another example, if you further increase the number of vias from 16 to 32, you will actually only get an additional 1°C/W improvement.

The AD5422 is packaged in a 6×6 LFCSP with an exposed pad on the bottom. In this case, the exposed pad should be connected to the lowest negative substrate of the device for proper thermal and electrical performance, in this case the AVSS layer. The thermal impedance value can be found on the data sheet and is rated at 28°C/W for this package. This clearly determines how much the internal die temperature will rise for every 1W of power dissipated on the chip. This value needs to be added to the system ambient temperature to determine the maximum system operating conditions.

If we consider that the power dissipation under short-circuit conditions is about 0.6W, and that the thermal impedance of this LFCSP package with the exposed pad connected is 28°C/W, we can calculate that the chip temperature will increase by 16.8°C under fault conditions. Of course, we also need to consider the temperature increase caused by the device's quiescent currents, such as the AVSS and AVDD supply currents. By referring to the data sheet, we can calculate that the total power dissipation of these quiescent current sources is about 128mW, which in itself will cause the chip temperature to increase by about 3.5°C. Therefore, if 24mA is driven into a short-circuited load when powered from a 26V supply, this 3.5°C plus the 16.8°C under short-circuit conditions gives a total chip temperature increase of about 20°C.

Calculating the maximum allowable system temperature within the module becomes very easy. Simply subtract the drop due to internal self-heating from the maximum junction temperature of the device (which can be obtained directly from the data sheet). Simple arithmetic shows that the maximum internal die temperature is 125°C. Subtracting 20.3°C from this gives a system or maximum system ambient temperature of 104.7°C. Most systems can operate in an ambient temperature of 70°C to 80°C, so for this example, the designer does not have to worry about anything. One issue is that in some cases a higher voltage supply may be required in the system, which may depend on the type of application the product is used in. If more than 40V or 45V is exceeded, the on-chip power dissipation can increase to nearly 1W, but as long as the above rules and guidelines are followed and the ambient temperature within the system is kept low enough, the device will still operate normally.

As mentioned above, we can add an external overcurrent device to allow excess current to reach the device from the outside, acting like a pass transistor, thus keeping the power consumption on the chip low. Of course, this transistor must be able to carry the appropriate current without introducing any errors into the system. While this is certainly a way to improve IC devices, it still requires that all power is lost within the module. If we consider that the size of modules is getting smaller and smaller, sometimes the number of channels in the system may be limited, or the maximum load to be driven needs to be reduced to keep the power consumption low.

Intelligent power solution

One way ADI has addressed this problem is by implementing an intelligent power scheme that senses the output load and then dynamically changes the output compliance voltage as needed when the programmed current changes or when the load changes. This is accomplished by simply integrating an on-chip DC-DC boost converter that steps up the voltage from the low voltage supply to provide whatever compliance voltage is needed at the output. When running the DC-DC converter from a nominal 5V supply, the lowest regulated voltage at the output is approximately 7V, while the highest supply voltage can exceed 30V, depending on the requirements. This example theoretically explains how the new design works and calculates the power utilization when using the dynamic power control feature, but note that this is for a 4-channel output device. In this case, the zero load condition needs to be considered again, which is a valid condition for current output. The device's internal circuitry senses the output, and when it finds that there is no load to drive, the device regulates the internal DC-DC output to approximately 7V; at this point, the chip power consumption is minimized to approximately 0.168W for a channel driving a 24mA output. The AD5755 has implemented this integrated power management scheme on a 4-channel device. This four-channel device has fully programmable current and voltage output ranges with up to 16-bit resolution, while each channel integrates a DC-DC to provide integrated dynamic power control. As a result, for four channels with shorted outputs, the maximum on-chip power consumption is only 0.672 W, which is 4 times lower than existing solutions under the same conditions. By using the dynamic power control function, we can not only ensure that the device protects itself, but also reduce the power consumption within the module to a minimum, as shown in Figure 4.

The implementation of an integrated on-chip DC-DC is similar to a standard boost converter, as shown in Figure 5, and the boost converter usually consists of two switches, an input/output capacitor, and an energy inductor. In the first phase, switch A is closed and B is open, causing the inductor current to increase linearly according to the change in the inductor, which is equal to dV×dt/L. In the second phase, switch A is open and B is closed, so the inductor is connected to the load and the output capacitor; during this off-time, the inductor current flows from the input to the output, and the voltage at the inductor terminal connected to the load through switch B will increase as the inductor tries to keep the current constant. This type of inductor generally has two operating modes, namely continuous and discontinuous mode; when the boost converter operates in continuous mode, the current through the inductor does not drop to zero. However, in some cases, the energy required by the load is so small that it does not require a full duty cycle to be delivered. In this case, the current through the inductor may drop to zero. The only difference from the principle described above is that the inductor is fully discharged before the duty cycle ends, which is called discontinuous mode.

The boost inductor circuit on the AD5755 uses a constant frequency current mode control scheme to boost the low voltage input of 5V to drive the output, and this DC-DC operates in discontinuous conduction mode with a duty cycle of less than 90%. Therefore, the figure shows an asynchronous converter; that is, an external Schottky diode is required in place of the switch I mentioned above. The Schottky diode is used to minimize power losses. Diodes with large forward voltage drops will result in reduced efficiency. The AD5755 itself contains an internal switch of about 0.425Ω for switching the DC-DC, and the switch current is monitored and the peak current is limited to about 0.8 A. Some other features of the switching converter are that the switching frequency can be selected on the device, with four different options. The phase of each channel can also be adjusted so that all phases are 90 degrees out of phase, so by supporting different clock edges, the DC-DC converter can reduce the peak power requirements at the input. In typical applications, a switching frequency of about 410kHz is recommended. When the load is light, the DC-DC converter will enter a pulse skipping mode to minimize the switching power consumption.

The AD5755, a quad-channel device, has programmable current and voltage outputs per channel. Similarly, each channel of the 16-bit CDAC also has 16-bit gain and offset registers, allowing the user to set zero-scale and full-scale values ​​for any output range. Each channel now also has a dedicated HART pin, which has been fully tested for HART compatibility. In addition to the dynamic power control functions already mentioned, many other diagnostic functions are integrated into the device. On the left, you can see the watchdog timer, which monitors activity on the SPI pins. For example, if a microcontroller in the system fails, the watchdog timer can set a fault condition, which can then be used to put the output into a known or fail-safe condition. In addition, open and short-circuit detection and protection are available on all output channels. Finally, digital slew rate control is available on the device, allowing the user to set the output slew rate. This is useful for actuator control applications, such as controlling slow devices, where you want to limit fast output changes.

Comparing some results of the dynamic power control function, the junction temperature rise when the dynamic power control function is implemented and not implemented for all four outputs at the same time under short-circuit conditions can be seen. When dynamic power control is not enabled, the internal chip temperature rises by about 70°C, which achieves a 75% thermal savings at the silicon IC level. In fact, these power and thermal advantages allow customers to achieve increased channel density in their systems without having to increase module or chassis size or sacrifice other design parameters such as temperature range, power supply or load conditions.

People often ask questions like, how much ripple will the on-chip DC-DC generate? And how does this affect the performance of the system? Especially considering that no LDO is used in the post-regulation stage? DC-DC suppression components are used in the design of the circuit, and AVCC is the power supply of the DC-DC-DC input, which is usually 5 V. To the left of the 10Ω resistor is the output of the DC-DC; for completeness, we have added an optional low-pass RC filter to act as a first-order anti-aliasing filter. The designed circuit also has a 4~20 mA output. Now there will be some resistive loads and some capacitive loads, and the cables are generally individually shielded single-pair or multi-pair twisted-pair cables. The wire capacitance depends on the type of cable, but it is good to be in the range of about 20pF~50pF per foot. When there is a resistive load, it has been mentioned that the maximum termination resistance is 1kΩ, and the same value is used in this example. In addition, we have provided optional load connections for the capacitors. This is to simulate loop capacitance when necessary. The device is set to output 20mA full-scale current into a 1kΩ load, and the VBoost output as well as the 4-20mA output are AC-coupled to the oscilloscope. Both waveforms are set to approximately 5mA for each division on the oscilloscope, and you can see that the ripple is approximately 7.6 mV with no capacitive load on the VBoost output. This is the 4-20mA output, and the full-scale settling time is approximately 580µs in this case. If you add a 1nF capacitor to the output load (this is to simulate line capacitance), you can see that the capacitance or peak-to-peak ripple drops to approximately 4.24 mV. Increasing the capacitance again to 10nF drops the ripple to less than 2mV, and the output settling time increases slightly again. It is worth noting that for voltage mode, the settling time is still in the microseconds range, and all the settling time data here is only related to the current mode output. This illustrates the trade-off between ripple magnitude and settling time and output capacitance. The system designer must determine how much ripple the system can tolerate.

In previous solutions, multiple discrete components were used to provide a complete system-level solution. Discrete data isolators are required for the SPI interface, switching transformer, PWM controller, and step-down DC-DC converter to generate the isolated DC-DC power required to power the converter. All of these components increase system board area, space, and cost. For lower power modules, such as the 1W~2W level, especially those that require channel-to-channel isolation, the AD347X series of devices shown in Figure 6 provide a higher degree of integration for power and isolation, providing a more integrated power management solution. These are four-channel digital isolators, but also integrate the PWM controller and transformer driver for the isolated DC-DC converter. This eliminates the need for a separate isolated DC-DC converter and designs with power consumption of 2W or less.