1750 views|1 replies

2w

Posts

341

Resources
The OP
 

When low EMI power supplies meet crowded circuit boards, what do you do? [Copy link]

This post was last edited by qwqwqw2088 on 2019-11-15 08:20

Limited and shrinking board space, tight design cycles, and stringent electromagnetic interference (EMI) regulations such as CISPR 32 and CISPR 25 all make it difficult to achieve power supplies with high efficiency and good thermal performance. The problem is compounded by the fact that power supply design is often near the end of the design process, and designers are struggling to squeeze complex power supplies into tighter spaces, which can be very frustrating. Performance compromises are made to meet deadlines, and the problem is left to testing and verification. Simplicity, high performance, and solution size are often in conflict: only one or two are prioritized, and the third is abandoned, especially when design deadlines are approaching. Sacrificing some performance has become commonplace, but it shouldn’t be.
This article begins with an overview of a serious problem that power supplies pose in complex electronic systems: EMI, often referred to as noise. Power supplies generate EMI and must be addressed, but what are the root causes of the problem? What are the common mitigation measures? This article describes strategies for reducing EMI and proposes a solution that can reduce EMI, maintain efficiency, and fit the power supply into a limited solution space.


What is EMI?


Electromagnetic interference is an electromagnetic signal that interferes with system performance. This interference affects circuits through electromagnetic induction, electrostatic coupling, or conduction. It is a key design challenge for automotive, medical, and test and measurement equipment manufacturers. The many limitations mentioned above and the ever-increasing power performance requirements (increased power density, higher switching frequencies, and higher currents) only amplify the impact of EMI, so solutions are urgently needed to reduce EMI. Many industries require that EMI standards must be met, and if not considered early in the design process, it will seriously affect the product's time to market.


EMI coupling type


EMI is a problem that occurs when interference sources in an electronic system couple with receivers (i.e., some components in the electronic system). EMI can be classified according to its coupling medium: conducted or radiated.

Conducted EMI (low frequency, 450 kHz to 30 MHz)
Conducted EMI is coupled to components by conduction through parasitic impedances and power and ground connections. The noise is transferred to another device or circuit by conduction. Conducted EMI can be further divided into common-mode noise and differential-mode noise.

Common-mode noise is conducted through parasitic capacitance and high dV/dt (C×dV/dt). It is transmitted along the path from any signal (positive or negative) to GND through parasitic capacitance, as shown in Figure 1.

Differential mode noise is conducted through parasitic inductance (magnetic coupling) and high di/dt (L× di/dt).


Figure 1. Differential-mode and common-mode noise.

Radiated EMI (High Frequency, 30 MHz to 1 GHz)
Radiated EMI is noise that is wirelessly transmitted to the device under test via magnetic field energy. In switching power supplies, this noise is the result of high di/dt coupled with parasitic inductance. Radiated noise can affect nearby devices.


EMI Control Technology


What is the typical approach to solving EMI-related problems in power supplies? First, identify that EMI is a problem. This may seem obvious, but determining its specifics can be time-consuming because it requires access to an EMI test chamber (which is not available everywhere) to quantify the electromagnetic energy generated by the power supply and determine whether it meets the EMI standard requirements of the system.

Assuming that the power supply presents an EMI problem after testing, the designer is faced with reducing EMI through a number of traditional correction strategies, including:

Layout Optimization: Careful power supply layout is just as important as selecting the right power supply components. Successful layout depends greatly on the experience level of the power supply designer. Layout optimization is inherently an iterative process, and an experienced power supply designer can help minimize the number of iterations, thereby avoiding delays and additional design costs. The problem is: this experience is often not available in-house.
Snubber: Some designers plan ahead and provide footprint for simple snubber circuits (simple RC filters from the switch node to GND). This can suppress switch node ringing (a contributor to EMI), but this technique results in increased losses, which negatively affects efficiency.
Reduce edge rate: Reducing switch node ringing can also be achieved by reducing the slew rate of the gate turn-on. Unfortunately, similar to the snubber, this can negatively affect the efficiency of the entire system.
Spread spectrum frequency modulation (SSFM): Many of ADI's power switching regulators offer this feature, which helps product designs pass stringent EMI test standards. With SSFM, the clock driving the switching frequency is modulated within a known range (for example, ±10% above and below the programmed frequency fSW). This helps distribute the peak noise energy over a wider frequency range.
Filters and shields: Filters and shields always take up a lot of cost and space. They also complicate production.


All of the above conditioning measures can reduce noise, but they also have drawbacks. Minimizing noise in power supply design is often a complete solution, but it is difficult to achieve. ADI's Silent Switcher and Silent Switcher 2 regulators achieve low noise at the regulator end, eliminating the need for additional filtering, shielding, or numerous layout iterations. By eliminating the need for expensive countermeasures, time to market is accelerated and significant cost savings are achieved.


Minimize current loops


To reduce EMI, the hot loops (high di/dt loops) in the power circuit must be identified and their effects reduced. The hot loops are shown in Figure 2. During one cycle of a standard buck converter, when M1 is off and M2 is on, the AC current flows along the blue loop. During the off cycle when M1 is on and M2 is off, the current flows along the green loop. The loop that produces the highest EMI is not entirely intuitive, it is neither the blue loop nor the green loop, but the purple loop that conducts the fully switched AC current (switching from zero to IPEAK and then back to zero). This loop is called the hot loop because it has the most AC and EMI energy.

What causes electromagnetic noise and switch ringing is the high di/dt and parasitic inductance in the hot loop of the switching regulator. To reduce EMI and improve functionality, the radiation effect of the purple loop needs to be minimized. The electromagnetic radiation disturbance of the hot loop increases with its area, so if possible, reducing the PC area of the hot loop to zero and using a zero-impedance ideal capacitor can solve the problem.


Figure 2. Buck converter thermal loop.


Achieving Low Noise Using Silent Switcher Stabilizers

Magnetic Field Cancellation
It is impossible to completely eliminate the hot loop area, but we can split the hot loop into two loops with opposite polarity. This can effectively form local magnetic fields that can effectively cancel each other at any distance from the IC. This is the concept behind the Silent Switcher regulator.


Figure 3. Magnetic field cancellation in a Silent Switcher regulator.


Another way to improve EMI is to shorten the wires
in the hot loop. This can be achieved by abandoning the traditional wire bonding method of connecting the chip to the package pins. The silicon chip is flipped in the package and copper pillars are added. The hot loop can be further reduced by shortening the distance from the internal FET to the package pins and input capacitors.


Figure 4. Schematic diagram of the disassembly of the LT8610 bond wire.


Figure 5. Flip chip with copper pillars.


Silent Switcher vs. Silent Switcher 2

Figure 6. A typical Silent Switcher application schematic and how it looks on a PCB.

Figure 6 shows a typical application using a Silent Switcher regulator, which can be identified by the symmetrical input capacitors on the two input voltage pins. Layout is very important in this scheme because Silent Switcher technology requires that these input capacitors be placed as symmetrically as possible to take advantage of the fields canceling each other. Otherwise, the benefits of SilentSwitcher technology are lost. The question, of course, is how to ensure correct layout during design and throughout production. The answer is the Silent Switcher 2 regulator.


Silent Switcher 2


Silent Switcher 2 regulators further reduce EMI. The sensitivity of EMI performance to PCB layout is eliminated by integrating the capacitors (VIN capacitor, INTVCC and boost capacitor) into the LQFN package, allowing them to be placed as close to the pins as possible. All hot loops and ground planes are internal, minimizing EMI and making the total solution footprint smaller.


Figure 7. Block diagram of Silent Switcher application and Silent Switcher 2 application.


Figure 8. The LT8640S Silent Switcher 2 regulator with the package removed.

Silent Switcher 2 technology also improves thermal performance. Multiple large ground exposed pads on the LQFN flip-chip package help the package dissipate heat through the PCB. Eliminating high-resistance bond wires can also improve conversion efficiency. When conducting EMI performance testing, the LT8640S can meet the CISPR25 Class5 peak limit requirements with a large margin.


Module Silent Switcher Regulators


The knowledge and experience gained from developing the Silent Switcher portfolio, combined with our existing broad Module portfolio, enables us to offer power products that are easy to design into while meeting some of the most important power supply requirements, including thermal performance, reliability, accuracy, efficiency, and good EMI performance.

The LTM8053 shown in Figure 9 integrates two input capacitors for magnetic field cancellation and some other passive components required for the power supply. All of this is implemented in a 6.25 mm × 9 mm × 3.32 mm BGA package, allowing customers to focus on the rest of the board design.


Figure 9. LTM8053 Silent Switcher exposed die and EMI results.

This post is from Analogue and Mixed Signal

2w

Posts

341

Resources
2
 

No LDO Regulator Required—Power Supply Case Study


A typical high-speed ADC requires many voltage rails, some of which must be very low noise to achieve the highest performance in the ADC data sheet. To strike a balance between high efficiency, small board space, and low noise, a generally accepted solution is to use a switching power supply in combination with an LDO post-regulator, as shown in Figure 10. The switching regulator can achieve higher step-down ratios with higher efficiency, but the noise is relatively high. The low-noise LDO post-regulator is relatively inefficient, but it can suppress most of the conducted noise generated by the switching regulator. Minimizing the step-down ratio of the LDO post-regulator helps improve efficiency. This combination produces a clean power supply that allows the ADC to operate at maximum performance. The problem is that multiple regulators make the layout more complicated, and the LDO post-regulator may cause heat dissipation issues under higher loads.


Figure 10. Typical power supply design for powering the AD9625 ADC.

The design shown in Figure 10 clearly involves some trade-offs. In this case, low noise is a priority, so efficiency and board space must compromise. But perhaps it doesn’t have to be. The latest generation of Silent Switcher Module devices combines low noise switching regulator design with Module packaging to simultaneously achieve the goals of easy design, high efficiency, small size, and low noise. These regulators not only minimize board space, but also enable scalability, allowing multiple voltage rails to be powered from a single Module regulator, further saving space and time. Figure 11 shows an alternative power tree for powering an ADC using the LTM8065 Silent Switcher Module regulator.


Figure 11. Using a Silent Switcher Module regulator to power the AD9625 provides a space-saving solution.

These designs have been tested and compared to each other. A recent article published by ADI tested and compared the performance of ADCs using the power supply designs shown in Figure 10 and Figure 11. The tests included the following three configurations:
Standard configuration using a switching regulator and an LDO regulator to power the ADC.
Using the LTM8065 to directly power the ADC without further filtering.
Using the LTM8065 and an additional output LC filter to further clean up the output.


LTM8065
Complete Step-Down Switch Mode Power Supply
Low Noise Silent Switcher Architecture
Wide Input Voltage Range: 3.4V to 40V
Wide Output Voltage Range: 0.97V to 18V
2.5A Continuous Output Current, 3.5A Peak
Selectable Switching Frequency: 200kHz to 3MHz
External
Synchronization Programmable Soft-Start
Tiny, Low Profile 6.25mm x 6.25mm x 2.32mm BGA RoHS Compliant Package
Measured SFDR and SNRFS results show that the LTM8065 can be used to directly power an ADC without compromising ADC performance. The key benefit of this implementation is a significant reduction in component count, which improves efficiency, simplifies production, and reduces board space.


summary


In summary, as more system-level designs need to meet more stringent specifications, it is critical to make the most of modular power design, especially when power design expertise is limited. Since many market segments require system designs to meet the latest EMI regulations, applying Silent Switcher technology to small-size designs and taking advantage of the ease of use of Module regulators can greatly reduce time to market while saving board space.

This post is from Analogue and Mixed Signal
 
 
 

Guess Your Favourite
Just looking around
Find a datasheet?

EEWorld Datasheet Technical Support

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews

Room 1530, Zhongguancun MOOC Times Building, Block B, 18 Zhongguancun Street, Haidian District, Beijing 100190, China Tel:(010)82350740 Postcode:100190

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
快速回复 返回顶部 Return list