Voltage doubler rectifier circuit principle

Voltage doubler rectifier circuit principle

Figure 1 Half-wave rectifier voltage circuit

(a) Negative half cycle (b) Positive half cycle

(1) During the negative half cycle, that is, when A is negative and B is positive, D1 is turned on and D2 is turned off. The power supply charges capacitor C1 through D1. Under ideal conditions, during this half cycle, D1 can be regarded as a short circuit. At the same time, capacitor C1 is charged to Vm. The current path and the polarity of capacitor C1 are shown in the figure above (a).

(2) In the positive half cycle, that is, when A is positive and B is negative, D1 is cut off and D2 is turned on. The power supply charges C2 through C1 and D1. Since the Vm of C1 plus the Vm of the secondary side of the double voltage transformer makes C2 charged to the maximum value of 2Vm, its current path and the polarity of capacitor C2 are shown in the figure (b) above.

In fact, the voltage of C2 cannot be charged to 2Vm within one and a half cycles. It must gradually approach 2Vm after several weeks. For the sake of convenience, the following circuit description also makes such an assumption.

If the half-wave voltage doubler is used in a power supply without a transformer, we must connect C1 in series with

Current limiting resistor to protect the diode from being damaged by the inrush current when the power supply is first charged.

If there is a load connected in parallel with the output of the voltage doubler, as would be expected, the voltage on capacitor C2 will drop during the negative half cycle (at the input) and then be recharged to 2Vm during the positive half cycle as shown in the figure below.

Figure 3 Output voltage waveform

Therefore, the voltage waveform on capacitor C2 is a half-wave signal filtered by the capacitor filter.

The circuit is called a half-wave voltage circuit.

During the positive half cycle, the maximum reverse voltage that diode D1 withstands is 2Vm. During the negative half cycle, the maximum reverse voltage that diode D2 withstands is also 2Vm. Therefore, a diode with PIV > 2Vm should be selected in the circuit.

2. Full-wave voltage doubler circuit

Figure 4 Full-wave rectifier voltage circuit

(a) positive half cycle (b) negative half cycle

Figure 5 Working principle of full-wave voltage

In the positive half cycle, D1 is turned on, D2 is turned off, and capacitor C1 is charged to Vm. The current path and polarity of capacitor C1 are shown in the figure above (a).

In the negative half cycle, D1 is cut off, D2 is turned on, and capacitor C2 is charged to Vm. The current path and polarity of capacitor C2 are shown in the figure above (b).

Since C1 and C2 are connected in series, the output DC voltage, V0 = Vm. If no load current is drawn from the circuit, the voltage on capacitors C1 and C2 is 2Vm. If a load current is drawn from the circuit, the voltage on capacitors C1 and C2 is the same as the voltage on a capacitor fed by the full-wave rectifier circuit. The difference is that the effective capacitance is the series capacitance of C1 and C2, which is smaller than that of C1 and C2 alone. This lower capacitance value will make its filtering effect not as good as that of a single capacitor filtering circuit.

In the positive half cycle, the maximum reverse voltage borne by diode D2 is 2Vm, and in the negative half cycle, the maximum reverse voltage borne by diode D1 is 2Vm, so a diode with PVI > 2Vm should be selected in the circuit.

Figure 6 Triple voltage circuit diagram

(a) Negative half cycle (b) Positive half cycle

Figure 7 Working principle of triple voltage

In the negative half cycle, D1 and D3 are turned on, D2 is turned off, and capacitors C1 and C3 are charged to Vm. The current path and polarity of the capacitors are shown in the figure above (a).

In the positive half cycle, D1 and D3 are cut off, D2 is turned on, and capacitor C2 is charged to 2Vm. Its current path and capacitor polarity are shown in the figure above (b).

Since C2 and C3 are connected in series, the output DC voltage V0 = 3m.

In the positive half cycle, the maximum reverse voltage that D1 and D3 withstand is 2Vm. In the negative half cycle, the maximum reverse voltage that diode D2 withstands is 2Vm. Therefore, a diode with PIV > 2Vm should be selected in the circuit.

4. N times voltage circuit

The generalized form of the half-wave voltage doubler circuit in the figure below can generate a voltage three or four times the input peak value. According to the circuit connection method, if additional diodes and capacitors are connected, the output voltage will become five, six, seven, or even more times the basic peak value (Vm). (That is, N times)

.

Working principle of N voltage multiplier circuit

In the negative half cycle, D1 is turned on, the other diodes are cut off, and the capacitor C1 is charged to Vm. The current path and the polarity of the capacitor are shown in Figure (a).

In the positive half cycle, D2 is turned on, the other diodes are cut off, and the capacitor C2 is charged to 2Vm. The current path and the polarity of the capacitor are shown in the figure above (b).

During the negative half cycle, D3 is turned on, the other diodes are cut off, and the capacitor C3 is charged to 2Vm. The current path and the polarity of the capacitor are shown in the figure above (c).

In the positive half cycle, D4 ​​is turned on, the other diodes are turned off, and the capacitor C4 is charged to 2Vm. The current path and the polarity of the capacitor are shown in the figure (d) above. Therefore, if you measure from the top of the transformer winding, you can get an odd multiple of Vm at the output. If you measure from the bottom of the transformer winding, the output voltage will be an even multiple of the peak voltage Vm.