ADIADP5034 Micro Power Management (PMU) Solution

电源管理单元(PMU)评估板主要特性,电路图,材料清单和元器件布局图.

The ADP5034 combines two high performance buck regulators and two low dropout (LDO) regulators in a small, 24-lead 4 mm × 4 mm LFCSP to meet demanding performance and board space requirements.

The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set to high, the buck regulators operate in forced PWM mode. When the MODE pin is set to low, the buck regulators operate in PWM mode when the load is above a pre-defined threshold. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency.

The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5034 LDOs extend the battery life of portable devices. The ADP5034 LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.

Regulators in the ADP5034 are activated through dedicated enable pins. The default output voltages can be externally set in the adjustable version, or factory programmable to a wide range of preset values in the fixed voltage version.

ADP5034主要特性:

Main input voltage range: 2.3 V to 5.5 V

Two 1200 mA buck regulators and two 300 mA LDOs

24-lead, 4 mm × 4 mm LFCSP package

Regulator accuracy: ±3%

Factory programmable or external adjustable VOUTx

3 MHz buck operation with forced PWM and auto PWM/PSM modes

BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V

LDO1/LDO2: output voltage range from 0.8 V to 5.2 V

LDO1/LDO2: low input supply voltage from 1.7 V to 5.5 V

LDO1/LDO2: high PSRR and low output noise

ADP5034应用:

Power for processors, ASICS, FPGAs, and RF chipsets

Portable instrumentation and medical devices

Space constrained devices

图1. ADP5034方框图

图2. ADP5034典型应用电路图

图3. ADP503采用PSM/PWM控制的处理器系统电源管理图

图4. ADP5034带使能引脚的固定输出电压电路图

图5. ADP5034带使能引脚的可调输出电压电路图

材料清单:

ADP5034微电源管理单元(PMU)评估板

The ADP5034 evaluation board has two step-down regulators with two LDOs that enable evaluation of the ADP5034. The evaluation board is available in standard voltage options.

The ADP5034 uses a proprietary high speed, current mode, constant frequency, pulse-width modulation (PWM) control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP5034 features a power save mode (PSM) that reduces the switching frequency under light load conditions, as well as the option to change the mode to fixed PWM operation. The 3 MHz switching frequency minimizes the size of the external components.

The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5034 LDO regulators extend the battery life of portable devices.


图6.ADP5034微电源管理单元(PMU)评估板外形图

ADP5034微电源管理单元(PMU)评估板主要特性:

Full-featured evaluation board for the ADP5034 Standalone capability Simple device measurements, including line and load regulation, demonstrable with A single voltage supply A voltmeter A current meter Load resistors Easy access to external components Cascading options to supply the low dropout (LDO) from either buck Dedicated enable option for each channel Mode option to change bucks from PFM to PWM operation



图7.ADP5034微电源管理单元(PMU)评估板电路图

图8.ADP5034微电源管理单元(PMU)评估板元件布局图(顶层)

图9.ADP5034微电源管理单元(PMU)评估板元件布局图(底层)
ADP5034评估板材料清单:

详情请见:
http://www.analog.com/static/imported-files/data_sheets/ADP5034.pdf
和
http://www.analog.com/static/imported-files/user_guides/UG-271.pdf